ARM7 | BIOS | Bug | EVM | JTAG | Linker | LOG_printf | McBSP | Profiling | Relocation | RTDX | Simulator | Target | Watch

Hi Adolf--

On 3/5/07, Adolf Klemenz <a...@dsignt.de> wrote:
...
...
...
> >## What will be effect of larger heap and stack size allocation than
> >required? Will it improve performance in terms of cycles?
>
> No, but the location of these memory sections will affect performance.
> Internal L2RAM memory is - as always - the best option. If in external
> memory (SDRAM) make sure that at least L1-cache is enabled for these areas.

I guess you meant "L2-cache enabled" rather than "L1-cache enabled"
unless if you were talking about C64x+ devices. In case of C64x L1
cache is always ON. Just to clarify.

--Bhooshan

(You need to be a member of code-comp -- send a blank email to code-comp-subscribe@yahoogroups.com )