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For engineers implementing DSP functions on FPGAs. This is a NEW Group that has just been created. It should take a few weeks before the group is big enough to become active. Please join!
Spartan 3A DSP 3400 CLOCK
flash7gold - Sep 3 2009
Hello !
I am beginner with FPGA. I started with ISE 11 Web pack and Spartan 3A Dsp 3400.
I try to make some simple projects but i realized that I have problems with cloc... 
unwanted phase difference on custome filter design [3 Articles]
qrep...@yahoo.com.au - Aug 25 2009
Hi, I a newbie and also to DSP...
Heres my question..
I have successfull implemented a custom bandpass filter design that will process a rpm signal (cranking 150rpm 100mVpp ~ h... System generator model [5 Articles]
aliu...@hotmail.com - Aug 21 2009
Hi, can anybody kindly suggest me from where i can get FM receiver (demodulator) models to implement on SFF SDR Development platform....please help
... whether fft will have same amplitude on change of number of samples?
shra...@hotmail.com - Aug 21 2009
kindly help me by telling that whether fft will have the same amplitude after the transform on change of number of samples that is if i will be attempting on 256 samples the amplit... Altera EP1AGX60 configuration
bigbibby2002 - Aug 2 2009
hello everyone,there're some questions about the ALTERA EP1AGX60 device's configuration.
Device: ARRIA GX EP1AGX60
Configuration mode : AS
1. if there's a erro in the configur... AM Transmitter and receiver ....please give your expert opinions
aliu...@hotmail.com - Jul 30 2009
I am making an AM transmitter and receiver on SFF SDR Development Platform. I am using model based approach. I have completed my Upssmpoling model using System Generator , Now what... High temperature operation
roge...@meciria.com - Jul 23 2009
We are in the process of migrating our control unit from 150degC to 175degC.
We currently use a DSPic, but this part is not suitable for the extended tenperature range.
I am ... Working on SSF SDR development platform
aliu...@hotmail.com - Jul 6 2009
Hi , i am working on SSF SDR development platform TMDSSFFSDRDP, the RF module in this kit has its range starting from 262 MHz and i want to work on lower frequency. I am planning t... C-Compiler FPGA
Ariel Hernandez - Jun 15 2009
Hello Everybody!
I have a problem! I need a C-Compiler for a XILINX Spartan3E-500 FG320.
Can someone help me?
Vielen Dank!
... Test vectors and test procedures for FFT & DWT implemented on FPGA
umesh_sa1 - Jun 10 2009
Hi all,
If i implement a 1024 point FFT and 2D-DWT on some FPGA what are the important test vectors and test procedures i should carry out the same on the FPGA board. Any idea o...