Hello,

During my readings in DSP for SDR applications using FPGA, I found an
interesting note which is the upsampling ratio of 4. I found this in two
different locations, one at digitizing the IF signal and one at upsampling
before pulse shaping. My question is about the reasons of choosing the ratio of
4 for these two cases. I am elaborating on them in the text below:

1- For IF sampling at the receiver. Some designs choose to oversample the IF
signal by 4 which means the fs=4IF. Is the main reeason behind this ratio is to
allow for efficient downconverting stage since the DDS will be replaced by
simple Mux? 

2- At pulse shaping at the transmission stage, many designs choose to upsample
by 4 (and some choose even 2 but I feel the majority is 4). Is the reason behind
the ratio of 4 is to allow phase and frequency tracking since if we upsample by
2 then we can only track the phase but not the frequency shifts of the signal at
the receiver? Is this true?

I raise this question to DSP and FPGA group experts and I am looking forward for
their opinions.

______________________________
New Code Sharing Section now Live on DSPRelated.com. Learn about the Reward Program for Contributors here.



(You need to be a member of fpgadsp -- send a blank email to fpgadsp-subscribe@yahoogroups.com )