For engineers implementing DSP functions on FPGAs. This is a NEW Group that has just been created. It should take a few weeks before the group is big enough to become active. Please join!
Hi, I am implementing Quadrature Amplitude modulator in verilog. In this first the serial data is converted into parallel form and applied directly to the pulse shaping filter(interpolation by factor 4). But my doubt is, how we can apply parallel bits(0's and 1's)directly to the filter?????? In my reference paper the input to filter is marked as 2-bit parellel data and output is marked as m-bit parellel data... Can anybody help me please........