Hi.  I generated 1 sine wave(24bit output[23:0]).  In order to control the
amplitude, the output multiply with a ratio(fixed point multiplier).  for fix
point multiplication, 

verilog declaration
sin [23:-10]//zero pad
ratio [0:-10]
result_mult [24:-20]

Asin <= result[23:0]

After the simulation, i realised that the THD+N is 74(-80db to -6)(the THD+N of
sine wave without multiplier is infinity).

May i know what is the problem to cause this?  How to reduce this?

Besides, why the result_mult have to be [24:-20] instead of [23:-20]? if use
[23:-20]. the result_mult always 2 times less than the correct one.

thanks a lot

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