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Discussion Groups | Freescale DSPs | ADC Clock divisor

Technical discussions about Freescale (Motorola) DSPs (including the DSP56000, DSP56300, DSP56600, 56800 DSPs).

  

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ADC Clock divisor - kj831ca - Sep 18 1:25:00 2003



I'm having problem with DSP56F805 board from NewMicro as A/D too
noisy about 100 mV. I tried the sample code cut from Motora SDK
documents without changing clock divisor from default 1 to 3 . My
questions are :

1. Did I blew the A/D in chip by overclocking it ?

2. What is the normal noise level of A/D on DSP56F805 ?

3. This code I cut from Motorola SDK doc
#include "adc.h"
#define ONE_VOLT 0x26C9 /* (32768 * (1/3.3 Volts)) */

Why ONE_VOLT is calculated from 32768 instead of 32760 and which
one is correct ? I've tried both seem 32760 is the correct, but since my
A/D is too noisy so I'm not sure about it.

Sorry for my english.

Best Regards
Kris




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