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On the
Motorola 563xx assembler the notation to specify long and short moves use "<" and ">".
i.e.
short (single
byte op code):
move x:<1,
A1
long (2 byte
op code):
move x:>1,
A1
I don't know
if this same syntax applies to the 5683xx, but you might try it.
The "L" and
"W" in move.l and move.w refer to the data width and not the address format.
A smart
assembler should be able to figure this out, but I wouldn't count on see
it.
Howard
Thanks Gary. I'll probably just modify my assembler to behave like
the CW assembler, for now. I can always correct it, if necessary,
later.
Regards,
-Pete.
--- In m...@yahoogroups.com, "bergy50us"
<forthprgrmr@h...>
wrote:> Hi Pete,
>
> page 3-39
> It
loads a 16 bit >>>signed<<< number. Addresses aren't usually
>
signed, so I'm guessing that since you specified the move.l rather
> than move.w, the
assembler is not trying to be smart enough to note
> that address from 0 to $7fff can
use the shorter format. Addresses
> from $8000 to $ffff will get moved far far
away.
> I don't see any reason that the lower addresses couldn't use the
>
shorter format.
>
> Gary Bergstrom
>
> --- In
m...@yahoogroups.com, "peter_f_gray"
<peter_f_gray@y...>
> wrote:
>
>
> >
> > Good point, but both models produce the same result. I'm
at a
loss
> > on this one. Given the choice of storing a $xxxx value using a
2-
or
> > 3-word instruction, I don't understand why the assembler would
even
> > need to use the 3-word instruction: $xxxx will fit in the second
> > word of the 2-word instruction, but the assembler splits it
across 2
> > words of the 3-word instruction. The problem is that I can't tell
if
> > this is accidental or deliberate behavior - and I can't find
> >
anything in the documentation which would point to one or the
other.
> >
> > --- In m...@yahoogroups.com, jeff.ruhge@f... wrote:
> > >
>
> > I see what you mean. Are you using the small or large data
memory
> > model? If you are using the large, maybe it will make a
difference
> > if you switch to small? Just a guess.
> > >
> >
>
> > > >
> > > >
> > >
>
> > > >
> > >
>Pages A-193/4 give the allowed operand combinations, it's page
A-
>
>
> > > >195/7 which break these down further. The 2- and
3-word
variants
> > can
> > > >be found on page
A-195 (the third and fifth items on the
page).
> > > >
> > > >
> > > >--- In , jeff.ruhge@f... wrote:
> > > >> On page A-194 of the DSP56800E 16-bit DSP Core Reference
>
> Manual
> > > >(Rev 2.0), it says the size of a move.l
#xxxxxx,RRR
instruction
> > is 3
> > > >words.
I didn't see one for #xxxx,RRR.
> > > >>
> >
> >>
> > > >> >
> > >
>> >
> > > >> >
> > >
>> >
> > > >> >
> > >
>> >Disassembling MC56F83xx_asm_init.asm, I notice that
> >
instructions
> > > >like
> > >
>> >
> > > >> >move.l #OSCTL,R1
> > > >> >
> > > >> >are being encoded
as 3-word instructions, rather than the 2-
> > word
> > >
>> >#xxxx,RRR form. No matter what optimization settings I've
> >
tried,
> > > >> >they're still coming out (in CW)
as
> > > >> >
> > > >>
>E419 F2D5 0000
> > > >> >
> >
> >> >rather than the 2-word
> > > >>
>
> > > >> >E409 F2D5
> > >
>> >
> > > >> >...anyone know why this would
be?
> > > >> >
> > > >>
>Thanks,
> > > >> >-Pete.
> >
> >> >
> > > >> >
> >
> >> >
> > > >> >
> >
> >> >
> > > >> >
> >
> >> >
> > > >> >
> >
> >> >
> > > >> >
> > >
>
> > > >
> > > >
> > >
>
> > > >
> > > >
>
> >
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