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Hi,

ESSI operating in the asynchronous mode requires separate frame syncs 
and uses separate clocks for clocking data in and out of the DSP. 
Though the clocks are independent for the transmitter and receiver, I 
would still assume that the clocks SCK0(TX clock) and SC00(RX clock) 
be in phase with another as they are still being generated from the 
same source when I have ESSI setup to use the internal clock. The 
Technical Datasheet (DSP56858) for ESSI does not indicate that the 
clocks would be out of phase. However, this is not the case when I 
view these two clocks on my oscilloscope they appear to be out of 
phase by half a cycle. Does anyone know why this is the case?

Thanks.
Hardeep
	

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