Hello I have a question about a passage i've read from a journal about
synchronization and estimation of bpsk signals with timing errors. It says
that in the receiver of bpsk signals (which uses matched filter) if two
successive bits (rectangular) are identical, an incorrect bit reference
will have no effect whatsoever on the error probability. It also says that
if two successive bits differ, the magnitude of the expected correlator
output is reduced by a factor (1-(2*normalized timing error)). I understand
that when there is a timing error there will be a reduction with
predescribed factor, however i don't see a reason for using two bits or a
reference bit in the receiver or calculating the bit error probability.
Anyone has an idea for this method which uses two bits for estimating one
bit? Is that a synchronization method when there is timing errors?
Thanks...

On Wed, 08 Aug 2012 07:20:47 -0500, anilresat wrote:

> Hello I have a question about a passage i've read from a journal about
> synchronization and estimation of bpsk signals with timing errors. It
> says that in the receiver of bpsk signals (which uses matched filter) if
> two successive bits (rectangular) are identical, an incorrect bit
> reference will have no effect whatsoever on the error probability. It
> also says that if two successive bits differ, the magnitude of the
> expected correlator output is reduced by a factor (1-(2*normalized
> timing error)). I understand that when there is a timing error there
> will be a reduction with predescribed factor, however i don't see a
> reason for using two bits or a reference bit in the receiver or
> calculating the bit error probability. Anyone has an idea for this
> method which uses two bits for estimating one bit? Is that a
> synchronization method when there is timing errors? Thanks...

The reason that the author talks about adjoining bits is because that's 
where you see a difference.

If you reduce the case down to baseband and normalize, then a message 
that consists of all ones or all zeros renders bit timing immaterial (and 
impossible to implement).  In the case where a 1 maps to a +1 received 
value, and a 0 to a -1 received value, then all ones means the received 
signal is a constant +1, while all zeros means the received signal is a 
constant -1.

To understand this, I suggest you grab some graph paper and a pencil, and 
sketch out some cases with both perfect and imperfect synchronization -- 
things should become clearer.

-- 
My liberal friends think I'm a conservative kook.
My conservative friends think I'm a liberal kook.
Why am I not happy that they have found common ground?

Tim Wescott, Communications, Control, Circuits & Software
http://www.wescottdesign.com