There are 6 messages in this thread.
You are currently looking at messages 0 to 6.
Hello everyone, I was puzzled by the implementation of digital integrator for a while. Here are my quesions: What is the meaning, or defination, of the time constant in the case of a digital integrator? For the analog one, it was defined by the RC network. For a 200ksps ADC input data, if the integration time is 1ms, I don't know which of the following is correct: A) accumulate 200 points (N = 1ms/(1/200k)) of data, output one point, then process the next 200 input data, output another one. The data rate will change from the input 200k to output 1k. B) accumulate continuously all the data, the result is divided by 200. It was like the direct translation of the integration formula, the data rate is not changed. In this case, the amplitude will be divided by the N but the time constant has nothing to do with the filtering effect. Another problem is the overflow of the accumulator. I'm thinking to caculate the average of the first 100 points of data, and substact it from all the subsequent input data to prevent the possible overflow. Any better ideas? Thanks for reading, JJ______________________________
Steve wrote: > Hello everyone, > > I was puzzled by the implementation of digital integrator for a while. Here > are my quesions: > > What is the meaning, or defination, of the time constant in the case of a > digital integrator? For the analog one, it was defined by the RC network. > For a 200ksps ADC input data, if the integration time is 1ms, I don't know > which of the following is correct: > > A) accumulate 200 points (N = 1ms/(1/200k)) of data, output one point, then > process the next 200 input data, output another one. The data rate will > change from the input 200k to output 1k. > > B) accumulate continuously all the data, the result is divided by 200. It > was like the direct translation of the integration formula, the data rate is > not changed. In this case, the amplitude will be divided by the N but the > time constant has nothing to do with the filtering effect. > Neither Just a bare integrator doesn't have a time constant, whether it's digital or analog. A bare integrator can have a _gain_, which in the case of an analog integrator has units of frequency, and in the simplest implementation with op-amps is, indeed, 1/RC. One common style of expressing the gains in a PID loop is to use reset time = 1/(integrator gain), in which case the "reset time" is the "time constant" of the resulting zero. If you absolutely must think of a "time constant" in terms of a digital integrating system, figure out what the analogous integrator gain is from the ADC to the DAC, and interpret that however you would interpret your analog system "time constant". > Another problem is the overflow of the accumulator. I'm thinking to caculate > the average of the first 100 points of data, and substact it from all the > subsequent input data to prevent the possible overflow. Any better ideas? > Eh? Where are you using this integrator? Arrange your system so it doesn't overflow, and be happy. If it's a control system, chances are you need to implement some sort of integrator anti-windup. What you are proposing won't prevent overflow in the end, but it _will_ make your system do odd things. -- Tim Wescott Wescott Design Services http://www.wescottdesign.com Posting from Google? See http://cfaj.freeshell.org/google/ "Applied Control Theory for Embedded Systems" came out in April. See details at http://www.wescottdesign.com/actfes/actfes.html______________________________
Steve wrote: > Hello everyone, > > I was puzzled by the implementation of digital integrator for a while. Here > are my quesions: > > What is the meaning, or defination, of the time constant in the case of a > digital integrator? For the analog one, it was defined by the RC network. > For a 200ksps ADC input data, if the integration time is 1ms, I don't know > which of the following is correct: > > A) accumulate 200 points (N = 1ms/(1/200k)) of data, output one point, then > process the next 200 input data, output another one. The data rate will > change from the input 200k to output 1k. > > B) accumulate continuously all the data, the result is divided by 200. It > was like the direct translation of the integration formula, the data rate is > not changed. In this case, the amplitude will be divided by the N but the > time constant has nothing to do with the filtering effect. > > Another problem is the overflow of the accumulator. I'm thinking to caculate > the average of the first 100 points of data, and substact it from all the > subsequent input data to prevent the possible overflow. Any better ideas? > > Thanks for reading, > JJ You mean a time constant 1/(1+sT). (not a pure integrator k/s). This has a z-transform found from the Bilinear transform or otherwise. There is no equivalent T in digital though it behaves the same way. F.______________________________
Steve wrote: > What is the meaning, or defination, of the time constant in the case of a > digital integrator? There is no such thing as time constant of an integrator. The analog or digital integrator does have gain. In the analog case, the gain is 1/RC. In the digital case, the gain is Fs. > For the analog one, it was defined by the RC network. > For a 200ksps ADC input data, if the integration time is 1ms, I don't know > which of the following is correct: > > A) accumulate 200 points (N = 1ms/(1/200k)) of data, output one point, then > process the next 200 input data, output another one. The data rate will > change from the input 200k to output 1k. > > B) accumulate continuously all the data, the result is divided by 200. It > was like the direct translation of the integration formula, the data rate is > not changed. In this case, the amplitude will be divided by the N but the > time constant has nothing to do with the filtering effect. > > Another problem is the overflow of the accumulator. I'm thinking to caculate > the average of the first 100 points of data, and substact it from all the > subsequent input data to prevent the possible overflow. Any better ideas? Neither of the above mentioned does make any sense. It all depends on what exactly are you trying to accomplish, however you seem to miss the understanding of the basics. Get a textbook on digital signal processing. Vladimir Vassilevsky DSP and Mixed Signal Design Consultant http://www.abvolt.com______________________________
I made a real time digital integrator with a 1st order IIR filter: Y[n]= X[n]+ Ki * Y[n-1] Ki is the coeficient of a low pass filter. The filter corner frequency must be 10 times lower than the minimum frequency that you need to integrate. This is not an ideal integrator, an analog RC integrator either. It is possible that you need a high pass filter before and after to integrate. I don't know for what you want to use it. Ask me for more information.______________________________
Steve, I would think that a RC low pass filter can be modeled as a first order Butterworth filter with the -3dB cutoff frequency fc = 1/ (2*pi*R*C). Also, some details on recursive filter implementation is available @ http://www.dspguide.com/CH19.PDF HTH, Krishna http://dsplog.blogspot.com______________________________