Ron N. wrote:> > FPGA's and DSP's are pretty much Turing complete (when hooked to a > standard off-the-shelf infinite size memory chip). You can implement > a DSP CPU inside an FPGA or simulate an FPGA in a DSP processor > with enough memory. If your algorithm fits within the DSP functional > units connected the way the chip architect put it together, then a > DSP is fine. If you need one more MAC or one more bit in an adder... > with some big FPGA's you can program your own 73-bit adders hooked > to 47 parallel MACs for a 1-cycle FIR filter if you need. With a DSP > you write a bigger program, and it goes slower... and slower... >The last has similarities to what I was mulling over.
[OT?] what's a FPGA?
Started by ●March 22, 2006
Reply by ●March 23, 20062006-03-23
Reply by ●March 23, 20062006-03-23
Richard Owlett wrote:> OK already,it is a Field Programmable Gate Array. > I understand, but not grok, the definition. > > Googling for FPGA introduction was not a satisfying experience. > searching Wikipedia.org was less soWhere is Ray when we need him? There may be good background stuff at http://www.andraka.com/ for you. There's a lot of expertise there. Jerry -- Engineering is the art of making what you want from things you can get. �����������������������������������������������������������������������
Reply by ●March 23, 20062006-03-23
Jerry Avins wrote:> Richard Owlett wrote: > >> OK already,it is a Field Programmable Gate Array. >> I understand, but not grok, the definition. >> >> Googling for FPGA introduction was not a satisfying experience. >> searching Wikipedia.org was less so > > > Where is Ray when we need him? There may be good background stuff at > http://www.andraka.com/ for you. There's a lot of expertise there. > > JerryWent to his site -- it filled in some blanks. The Xilinx was not useful -- *TOOOO* much fine detail
Reply by ●March 23, 20062006-03-23
Richard Owlett <rowlett@atlascomm.net> writes:> Jerry Avins wrote: > > > Richard Owlett wrote: > > > >> OK already,it is a Field Programmable Gate Array. > >> I understand, but not grok, the definition. > >> > >> Googling for FPGA introduction was not a satisfying experience. > >> searching Wikipedia.org was less so > > Where is Ray when we need him? There may be good background stuff at > > http://www.andraka.com/ for you. There's a lot of expertise there. > > Jerry > > Went to his site -- it filled in some blanks. > > The Xilinx was not useful -- *TOOOO* much fine detailDoes this one help any? http://www.fpga4fun.com/WhatAreFPGAs.html Cheers, Martin -- martin.j.thompson@trw.com TRW Conekt - Consultancy in Engineering, Knowledge and Technology http://www.trw.com/conekt
Reply by ●March 23, 20062006-03-23
Martin Thompson wrote:> Richard Owlett <rowlett@atlascomm.net> writes: > > >>Jerry Avins wrote: >> >> >>>Richard Owlett wrote: >>> >>> >>>>OK already,it is a Field Programmable Gate Array. >>>>I understand, but not grok, the definition. >>>> >>>>Googling for FPGA introduction was not a satisfying experience. >>>>searching Wikipedia.org was less so >>> >>>Where is Ray when we need him? There may be good background stuff at >>>http://www.andraka.com/ for you. There's a lot of expertise there. >>>Jerry >> >>Went to his site -- it filled in some blanks. >> >>The Xilinx was not useful -- *TOOOO* much fine detail > > > Does this one help any? > http://www.fpga4fun.com/WhatAreFPGAs.html > > Cheers, > Martin >Yes, I had arrived there through the OPENCORES site.
Reply by ●March 24, 20062006-03-24
Richard Owlett wrote:> OK already,it is a Field Programmable Gate Array. > I understand, but not grok, the definition. > [snip] > If your life depended on giving a useful URL, what would it be? > [snip]Links from somebody's suggestion lead to: 1. Barr, Michael. "Programmable Logic: What's it to Ya?," Embedded Systems Programming, June 1999, pp. 75-84. http://www.netrino.com/Articles/ProgrammableLogic/ 2. comp.arch.fpga -- Now why hadn't I thought to look for a group with 'fpga' in its name ;/ thanks to all
Reply by ●March 24, 20062006-03-24
robert bristow-johnson wrote:> in article 1223n1leklggtb8@corp.supernews.com, Richard Owlett at > rowlett@atlascomm.net wrote on 03/22/2006 18:22: > > >>OK already,it is a Field Programmable Gate Array. >>I understand, but not grok, the definition. >> >>Googling for FPGA introduction was not a satisfying experience. >>searching Wikipedia.org was less so > > > wow. usually WP is good for this sorta thing. someone (knowledgeable) > needs to write/edit the articles on this. >It was much more useful after reading responses I got here.> >>If your life depended on giving a useful URL, what would it be? >> >>Part of the inspiration for this question is recent thread discussing >>VHDL for FPGA to do FIR filter. Ain't that what DSP's are for? > > > FPGAs are really big. you can make a state machine out of them. maybe for > cheaper than putting in a real uP that can do the same thing at the same > speed. it doesn't surprise me that people make little dedicated DSPs out of > them (and they might have some chip area left over for other little chores). > > >>Get the idea I know I'm missing something basic? > > > FPGAs came around right when i was getting out of this hardcore hardware, so > this is from one ignorant to another. i dealt with straight TTL and CMOS > logic, PALs, the AMD 2900 bit-slice stuff, and wiring good old > microprocessors to memory and periphs. sorta ca. 1980 sorta stuff. biggest > thing i ever wired up was a simple 68000 based thingie. > > Richard, did you deal with PALs (sometimes called "PLA" instead)? FPGAs are > sorta like really big PALs that you can program like it's a peripheral on a > computer bus. VHDL is some kinda language for programming these things (at > least XILINX, if some other make of FPGA uses VHDL, i'm too ignorant about > it). >PALs and bit-slice were just coming in when I left component level. Went on to bigger and better smoke tests -- got to observe what happens when one phase of a 1 MW substation is taken to ground thru 2 inch by .75 inch ~20 gauge copper strap ;}> >>I've a "bright" idea but will not expose it to competent criticism until >>I understand just what is a FPGA and what it can/can't do and just how >>"programmable" it is. > > > oh, take a chance! i, at least, won't pick on you. >OK, you invited me :] I have a interest in speech recognition. I haven't purchased anything because users *and* VARs have told be I probably wouldn't be satisfied. [My desires would be better met by a 'discrete speech' rather than the current orientation to 'continuous speech -- but that discussion goes far OT] That said, I read in comp.speech.users and comp.speech.research of what my gut says are excessively tight constraints on the acoustic environment [especially normal office noise and careful mike placement]. I envision an external signal conditioning module containing 5-8 band pass linear phase with 5 < Q < 20 2-10 band pass linear phase with 20 < Q < 200 [all above outputs in time sync with a latency of < .1 second] { How I combine this to get off chip is up in the air.] The above is based on some almost *TOTALLY UNTESTED* ideas of what I really want to accomplish. I was thinking the parallel nature of what I envisioned lent it to a FPGA approach. You *DID* ask ;)> >>PS in my day computers used 6J6's and/or 12AX7's and spoke to 026's ;/ > > > other than the Heathkit HW-100 when i was a teenage ham radio guy, i hadn't > had much experience with tubes. diddled with them a little for guitar amp > purposes and have an idea of the V-I curves and such, but building a real > computer with them sounds frightful. > >Nice and warm on a cold winters night.
Reply by ●March 24, 20062006-03-24
Richard Owlett wrote: ...> I envision an external signal conditioning module containing > 5-8 band pass linear phase with 5 < Q < 20 > 2-10 band pass linear phase with 20 < Q < 200I'm left wondering how "Q" and "linear phase" are implemented together. ... Jerry -- Engineering is the art of making what you want from things you can get. �����������������������������������������������������������������������
Reply by ●March 24, 20062006-03-24
Jerry Avins wrote:> Richard Owlett wrote: > > ... > > > I envision an external signal conditioning module containing > > 5-8 band pass linear phase with 5 < Q < 20 > > 2-10 band pass linear phase with 20 < Q < 200 > > I'm left wondering how "Q" and "linear phase" are implemented together.For FIR (and some IIR) systems, magnitude and phase response can be specified independently. I don't see any problems in implementing those specs.
Reply by ●March 24, 20062006-03-24
Andor wrote:> Jerry Avins wrote: > >>Richard Owlett wrote: >> >> ... >> >> >>>I envision an external signal conditioning module containing >>>5-8 band pass linear phase with 5 < Q < 20 >>>2-10 band pass linear phase with 20 < Q < 200 >> >>I'm left wondering how "Q" and "linear phase" are implemented together. > > > For FIR (and some IIR) systems, magnitude and phase response can be > specified independently. I don't see any problems in implementing those > specs. >My recollection of a definition of Q was simply ratio of (center frequency) to (bandwidth). I'm implicitly leaving flatness in the passband loosely (if at all) constrained. Also I thought that FIR filters had intrinsically constant group delay -- which is what's needed. Should I've not said "linear phase", thought they were implicitly equivalent?
