I need to implement a decimation filter( using CIC structure )in C. I have created integrator block,another block for decimation and finally a third block for comb structure and cascaded them in that order.But the final frequency response doesnot match the theoretical graph.I have used 2's compliment notation,Q15 format. It shall be of great help if anyone has sample codes for this filter. Regards, Sowmini

# CIC decimation filter

Started by ●October 5, 2007

Posted by ●October 5, 2007

"sowmini"wrote in message news:QuOdnTcZUeo5uJvanZ2dnUVZ_hisnZ2d@giganews.com... > I need to implement a decimation filter( using CIC structure )in C. > I have created integrator block,another block for decimation and finally a > third block for comb structure and cascaded them in that order.But the > final frequency response doesnot match the theoretical graph.I have used > 2's compliment notation,Q15 format. > > It shall be of great help if anyone has sample codes for this filter. > > Regards, > Sowmini > >How wide are your integrator and comb registers? They have to be very large if you are doing a significant amount decimation, something like input_width + N*log2(R) where R is decimation rate and N is the number of stages. In my vhdl CIC they are about 80 bits wide. So unless you are using floating point, I doubt it will work in straight C code. -Clark

Posted by ●October 5, 2007

... and you can't use floating point for CIC filters. Dirk On Oct 5, 8:36 am, "cpope"wrote: So unless you are using floating > point, I doubt it will work in straight C code. > > -Clark

Posted by ●October 5, 2007

On Oct 5, 8:56 am, dbellwrote: > ... and you can't use floating point for CIC filters. > > Dirk > > On Oct 5, 8:36 am, "cpope"Forgot to say... I have done them successfully in straight C code with (long) integer calulations. I don't remember how many stages though. Dirk Clark, How is the world after W-J? Dirkwrote: > So unless you are using floating > > > > > point, I doubt it will work in straight C code. > > > -Clark- Hide quoted text - > > - Show quoted text -

Posted by ●October 8, 2007

As per the relation,RegisterWidth = k × log2(Mc)+ Bin for k=4,Mc=4 and Bin =16, the registerwidth=24 and i have used 32 bit wide registers instead.

Posted by ●October 16, 2007

sowmini wrote:> I need to implement a decimation filter( using CIC structure )in C. > I have created integrator block,another block for decimation and finally a > third block for comb structure and cascaded them in that order.But the > final frequency response doesnot match the theoretical graph.I have used > 2's compliment notation,Q15 format. > > It shall be of great help if anyone has sample codes for this filter. > > Regards, > Sowmini >The CIC only works with fixed point arithmetic, and you cannot round/truncate bits in the integrator stages. The integrators must have enough bits to represent the full scale input multiplied by the CIC gain without overflow. The CIC gain is (N*R)^M where N is the number of samples delay in the comb section (typically 1), R is the decimation ratio, and M is the order of the filter (i.e. the number of cascaded integrator and comb stages). Typical CIC filters have order (M) of around 4 or 5, so the gain is related to R^5. The number of bits required in the accumulator is then I+M*log2(N*R), which can easily exceed 50 bits. There are not many CIC filters with only 16 bits. You can drop LSBs in the decimation stage before the comb sections, so the comb sections don't usually need nearly as many bits as the integrators in a decimating CIC.

Posted by ●October 3, 2010

>sowmini wrote: > >> I need to implement a decimation filter( using CIC structure )in C. >> I have created integrator block,another block for decimation and finallya>> third block for comb structure and cascaded them in that order.But the >> final frequency response doesnot match the theoretical graph.I haveused>> 2's compliment notation,Q15 format. >> >> It shall be of great help if anyone has sample codes for this filter. >> >> Regards, >> Sowmini >> > >The CIC only works with fixed point arithmetic, and you cannot >round/truncate bits in the integrator stages. The integrators must have >enough bits to represent the full scale input multiplied by the CIC gain >without overflow. The CIC gain is (N*R)^M where N is the number of >samples delay in the comb section (typically 1), R is the decimation >ratio, and M is the order of the filter (i.e. the number of cascaded >integrator and comb stages). Typical CIC filters have order (M) of >around 4 or 5, so the gain is related to R^5. The number of bits >required in the accumulator is then I+M*log2(N*R), which can easily >exceed 50 bits. There are not many CIC filters with only 16 bits. >You can drop LSBs in the decimation stage before the comb sections, so >the comb sections don't usually need nearly as many bits as the >integrators in a decimating CIC. >Hi pals, Im now doing a CIC decimation filter design for decimation rate2, delay 2, and 6stages. For the bits overflow, I have try to use the Hogenauer Pruning method from the text book UMeyerBaese, by using the cic.exe i generate the code below. It works fine in VHDL. But for the matlab, when in short bit width it will have the same correct output with the VHDL, somehow it have "noise" when the width is large where it is more than 1000 and above. If can Ill upload a screenshot so that u have a better picture of my problem. Is there any other method to do the hogenauer pruning in Matlab. %Hogenauer pruning cic.exe -- -------------------------------------------------------- -- Program for the design of a CIC decimator. -- -------------------------------------------------------- -- Input bit width Bin = 32 -- Output bit width Bout = 32 -- Number of stages S = 6 -- Decimation factor R = 2 -- COMB delay D = 2 -- Frequency resolution DR = 4 -- Passband freq. ratio P = 8 -- -------------------------------------------------------- -- ----------------- Results of the Design ---------------- -- -------------------------------------------------------- -- -------- Computed bit width: -- -------- Maximum bit growth over all stages = 12 -- -------- Maximum bit width including sign Bmax+1 = 44 -- Stage 1 INTEGRATOR. Bit width : 44 -- Stage 2 INTEGRATOR. Bit width : 42 -- Stage 3 INTEGRATOR. Bit width : 41 -- Stage 4 INTEGRATOR. Bit width : 40 -- Stage 5 INTEGRATOR. Bit width : 39 -- Stage 6 INTEGRATOR. Bit width : 38 -- Stage 1 COMB. Bit width : 38 -- Stage 2 COMB. Bit width : 37 -- Stage 3 COMB. Bit width : 37 -- Stage 4 COMB. Bit width : 36 -- Stage 5 COMB. Bit width : 35 -- Stage 6 COMB. Bit width : 34 -- ------- Maximum aliasing component : 0.000034 = 89.30 dB -- ------- Amplitude distortion : 0.532563 = 5.47 dB --MATLAB-- D = 2; % Differential delay R = 2; % Downsampler delayBuffer1 = zeros(1,D); delayBuffer2 = zeros(1,D); delayBuffer3 = zeros(1,D); delayBuffer4 = zeros(1,D); delayBuffer5 = zeros(1,D); delayBuffer6 = zeros(1,D); intOut1 = 0; intOut2 = 0; intOut3 = 0; intOut4 = 0; intOut5 = 0; intOut6 = 0; input = [Pulse100nsSigned' zeros(1,20)]; % impulse input output = []; % output for i = 1:length(input) % integrators intOut1 = intOut1 + input(i)/4; intOut2 = intOut2 + intOut1/2; intOut3 = intOut3 + intOut2/2; intOut4 = intOut4 + intOut3/2; intOut5 = intOut5 + intOut4/2; intOut6 = intOut6 + intOut5; % downsample if mod(i,R)==1 % combs combOut1 = intOut6/2 - delayBuffer1(2); delayBuffer1(2) = delayBuffer1(1); delayBuffer1(1) = intOut6/2; combOut2 = combOut1 - delayBuffer2(2); delayBuffer2(2) = delayBuffer2(1); delayBuffer2(1) = combOut1; combOut3 = combOut2/2 - delayBuffer3(2); delayBuffer3(2) = delayBuffer3(1); delayBuffer3(1) = combOut2/2; combOut4 = combOut3/2 - delayBuffer4(2); delayBuffer4(2) = delayBuffer4(1); delayBuffer4(1) = combOut3/2; combOut5 = combOut4/2 - delayBuffer5(2); delayBuffer5(2) = delayBuffer5(1); delayBuffer5(1) = combOut4/2; combOut6 = combOut5/4 - delayBuffer6(2); delayBuffer6(2) = delayBuffer6(1); delayBuffer6(1) = combOut5/4; output = [output combOut6]; end end output

Posted by ●October 3, 2010

clairechanwrote: >Hi pals, Im now doing a CIC decimation filter design for decimation rate2, >delay 2, and 6stages. For the bits overflow, I have try to use the >Hogenauer Pruning method from the text book UMeyerBaese, by using the >cic.exe i generate the code below. It works fine in VHDL. But for the >matlab, when in short bit width it will have the same correct output with >the VHDL, somehow it have "noise" when the width is large where it is more >than 1000 and above. If can Ill upload a screenshot so that u have a better >picture of my problem. Is there any other method to do the hogenauer >pruning in Matlab.Since it works in VHDL, can you patch the VHDL code into your matlab simulation and run it, so that you can avoid evne modeling it in matlab. Steve (always looking for a quick fix)

Posted by ●November 24, 2010

>clairechanrate2,wrote: > >>Hi pals, Im now doing a CIC decimation filter design for decimation >>delay 2, and 6stages. For the bits overflow, I have try to use the >>Hogenauer Pruning method from the text book UMeyerBaese, by using the >>cic.exe i generate the code below. It works fine in VHDL. But for the >>matlab, when in short bit width it will have the same correct outputwith>>the VHDL, somehow it have "noise" when the width is large where it ismore>>than 1000 and above. If can Ill upload a screenshot so that u have abetter>>picture of my problem. Is there any other method to do the hogenauer >>pruning in Matlab. > >Since it works in VHDL, can you patch the VHDL code into your matlab >simulation and run it, so that you can avoid evne modeling it in matlab. > > >Steve (always looking for a quick fix) > > >Thanks the tips is very helpful, and the problem is solved. God bless.

Posted by ●November 24, 2010

>clairechanrate2,wrote: > >>Hi pals, Im now doing a CIC decimation filter design for decimation >>delay 2, and 6stages. For the bits overflow, I have try to use the >>Hogenauer Pruning method from the text book UMeyerBaese, by using the >>cic.exe i generate the code below. It works fine in VHDL. But for the >>matlab, when in short bit width it will have the same correct outputwith>>the VHDL, somehow it have "noise" when the width is large where it ismore>>than 1000 and above. If can Ill upload a screenshot so that u have abetter>>picture of my problem. Is there any other method to do the hogenauer >>pruning in Matlab. > >Since it works in VHDL, can you patch the VHDL code into your matlab >simulation and run it, so that you can avoid evne modeling it in matlab. > > >Steve (always looking for a quick fix) > > >Thanks the tips is very helpful, and the problem is solved. God bless.

Posted by ●October 3, 2010

clairechanwrote: >Hi pals, Im now doing a CIC decimation filter design for decimation rate2, >delay 2, and 6stages. For the bits overflow, I have try to use the >Hogenauer Pruning method from the text book UMeyerBaese, by using the >cic.exe i generate the code below. It works fine in VHDL. But for the >matlab, when in short bit width it will have the same correct output with >the VHDL, somehow it have "noise" when the width is large where it is more >than 1000 and above. If can Ill upload a screenshot so that u have a better >picture of my problem. Is there any other method to do the hogenauer >pruning in Matlab.Since it works in VHDL, can you patch the VHDL code into your matlab simulation and run it, so that you can avoid evne modeling it in matlab. Steve (always looking for a quick fix)

Posted by ●October 3, 2010

>sowmini wrote: > >> I need to implement a decimation filter( using CIC structure )in C. >> I have created integrator block,another block for decimation and finallya>> third block for comb structure and cascaded them in that order.But the >> final frequency response doesnot match the theoretical graph.I haveused>> 2's compliment notation,Q15 format. >> >> It shall be of great help if anyone has sample codes for this filter. >> >> Regards, >> Sowmini >> > >The CIC only works with fixed point arithmetic, and you cannot >round/truncate bits in the integrator stages. The integrators must have >enough bits to represent the full scale input multiplied by the CIC gain >without overflow. The CIC gain is (N*R)^M where N is the number of >samples delay in the comb section (typically 1), R is the decimation >ratio, and M is the order of the filter (i.e. the number of cascaded >integrator and comb stages). Typical CIC filters have order (M) of >around 4 or 5, so the gain is related to R^5. The number of bits >required in the accumulator is then I+M*log2(N*R), which can easily >exceed 50 bits. There are not many CIC filters with only 16 bits. >You can drop LSBs in the decimation stage before the comb sections, so >the comb sections don't usually need nearly as many bits as the >integrators in a decimating CIC. >Hi pals, Im now doing a CIC decimation filter design for decimation rate2, delay 2, and 6stages. For the bits overflow, I have try to use the Hogenauer Pruning method from the text book UMeyerBaese, by using the cic.exe i generate the code below. It works fine in VHDL. But for the matlab, when in short bit width it will have the same correct output with the VHDL, somehow it have "noise" when the width is large where it is more than 1000 and above. If can Ill upload a screenshot so that u have a better picture of my problem. Is there any other method to do the hogenauer pruning in Matlab. %Hogenauer pruning cic.exe -- -------------------------------------------------------- -- Program for the design of a CIC decimator. -- -------------------------------------------------------- -- Input bit width Bin = 32 -- Output bit width Bout = 32 -- Number of stages S = 6 -- Decimation factor R = 2 -- COMB delay D = 2 -- Frequency resolution DR = 4 -- Passband freq. ratio P = 8 -- -------------------------------------------------------- -- ----------------- Results of the Design ---------------- -- -------------------------------------------------------- -- -------- Computed bit width: -- -------- Maximum bit growth over all stages = 12 -- -------- Maximum bit width including sign Bmax+1 = 44 -- Stage 1 INTEGRATOR. Bit width : 44 -- Stage 2 INTEGRATOR. Bit width : 42 -- Stage 3 INTEGRATOR. Bit width : 41 -- Stage 4 INTEGRATOR. Bit width : 40 -- Stage 5 INTEGRATOR. Bit width : 39 -- Stage 6 INTEGRATOR. Bit width : 38 -- Stage 1 COMB. Bit width : 38 -- Stage 2 COMB. Bit width : 37 -- Stage 3 COMB. Bit width : 37 -- Stage 4 COMB. Bit width : 36 -- Stage 5 COMB. Bit width : 35 -- Stage 6 COMB. Bit width : 34 -- ------- Maximum aliasing component : 0.000034 = 89.30 dB -- ------- Amplitude distortion : 0.532563 = 5.47 dB --MATLAB-- D = 2; % Differential delay R = 2; % Downsampler delayBuffer1 = zeros(1,D); delayBuffer2 = zeros(1,D); delayBuffer3 = zeros(1,D); delayBuffer4 = zeros(1,D); delayBuffer5 = zeros(1,D); delayBuffer6 = zeros(1,D); intOut1 = 0; intOut2 = 0; intOut3 = 0; intOut4 = 0; intOut5 = 0; intOut6 = 0; input = [Pulse100nsSigned' zeros(1,20)]; % impulse input output = []; % output for i = 1:length(input) % integrators intOut1 = intOut1 + input(i)/4; intOut2 = intOut2 + intOut1/2; intOut3 = intOut3 + intOut2/2; intOut4 = intOut4 + intOut3/2; intOut5 = intOut5 + intOut4/2; intOut6 = intOut6 + intOut5; % downsample if mod(i,R)==1 % combs combOut1 = intOut6/2 - delayBuffer1(2); delayBuffer1(2) = delayBuffer1(1); delayBuffer1(1) = intOut6/2; combOut2 = combOut1 - delayBuffer2(2); delayBuffer2(2) = delayBuffer2(1); delayBuffer2(1) = combOut1; combOut3 = combOut2/2 - delayBuffer3(2); delayBuffer3(2) = delayBuffer3(1); delayBuffer3(1) = combOut2/2; combOut4 = combOut3/2 - delayBuffer4(2); delayBuffer4(2) = delayBuffer4(1); delayBuffer4(1) = combOut3/2; combOut5 = combOut4/2 - delayBuffer5(2); delayBuffer5(2) = delayBuffer5(1); delayBuffer5(1) = combOut4/2; combOut6 = combOut5/4 - delayBuffer6(2); delayBuffer6(2) = delayBuffer6(1); delayBuffer6(1) = combOut5/4; output = [output combOut6]; end end output

Posted by ●October 16, 2007

sowmini wrote:> I need to implement a decimation filter( using CIC structure )in C. > I have created integrator block,another block for decimation and finally a > third block for comb structure and cascaded them in that order.But the > final frequency response doesnot match the theoretical graph.I have used > 2's compliment notation,Q15 format. > > It shall be of great help if anyone has sample codes for this filter. > > Regards, > Sowmini >The CIC only works with fixed point arithmetic, and you cannot round/truncate bits in the integrator stages. The integrators must have enough bits to represent the full scale input multiplied by the CIC gain without overflow. The CIC gain is (N*R)^M where N is the number of samples delay in the comb section (typically 1), R is the decimation ratio, and M is the order of the filter (i.e. the number of cascaded integrator and comb stages). Typical CIC filters have order (M) of around 4 or 5, so the gain is related to R^5. The number of bits required in the accumulator is then I+M*log2(N*R), which can easily exceed 50 bits. There are not many CIC filters with only 16 bits. You can drop LSBs in the decimation stage before the comb sections, so the comb sections don't usually need nearly as many bits as the integrators in a decimating CIC.

Posted by ●October 8, 2007

As per the relation,RegisterWidth = k × log2(Mc)+ Bin for k=4,Mc=4 and Bin =16, the registerwidth=24 and i have used 32 bit wide registers instead.

Posted by ●October 5, 2007

On Oct 5, 8:56 am, dbellwrote: > ... and you can't use floating point for CIC filters. > > Dirk > > On Oct 5, 8:36 am, "cpope"Forgot to say... I have done them successfully in straight C code with (long) integer calulations. I don't remember how many stages though. Dirk Clark, How is the world after W-J? Dirkwrote: > So unless you are using floating > > > > > point, I doubt it will work in straight C code. > > > -Clark- Hide quoted text - > > - Show quoted text -

Posted by ●October 5, 2007

... and you can't use floating point for CIC filters. Dirk On Oct 5, 8:36 am, "cpope"wrote: So unless you are using floating > point, I doubt it will work in straight C code. > > -Clark

Posted by ●October 5, 2007

"sowmini"wrote in message news:QuOdnTcZUeo5uJvanZ2dnUVZ_hisnZ2d@giganews.com... > I need to implement a decimation filter( using CIC structure )in C. > I have created integrator block,another block for decimation and finally a > third block for comb structure and cascaded them in that order.But the > final frequency response doesnot match the theoretical graph.I have used > 2's compliment notation,Q15 format. > > It shall be of great help if anyone has sample codes for this filter. > > Regards, > Sowmini > >How wide are your integrator and comb registers? They have to be very large if you are doing a significant amount decimation, something like input_width + N*log2(R) where R is decimation rate and N is the number of stages. In my vhdl CIC they are about 80 bits wide. So unless you are using floating point, I doubt it will work in straight C code. -Clark

Posted by ●October 5, 2007

I need to implement a decimation filter( using CIC structure )in C. I have created integrator block,another block for decimation and finally a third block for comb structure and cascaded them in that order.But the final frequency response doesnot match the theoretical graph.I have used 2's compliment notation,Q15 format. It shall be of great help if anyone has sample codes for this filter. Regards, Sowmini