Harmonic Notch Filter
A practical, DSP-friendly recipe for scrubbing 60 Hz power-line hum and its harmonics from noisy ECG and EEG recordings is presented, using IIR notch filters built from second-order all-pass sections. The post derives how to set all-pass phase to place notches and compute biquad coefficients by solving a simple 2x2 system, then shows C code and precomputed coefficients for cascading the first eight odd harmonics at a 2 kHz sample rate. Engineers get a compact, editable implementation with explicit control over notch bandwidth.
Ancient History
Technology moves fast, and the tools, platforms, and assumptions you rely on can become outdated almost overnight. In this reflective post, the author contrasts the rapid evolution of embedded development with the much slower pace of social change, from programming turnaround times to the underrepresentation of women in engineering. It is a reminder to keep learning, but also to think about how we work and who gets included.
Dealing With Fixed Point Fractions
Fixed-point fractional math is easy to botch, and this post lays out pragmatic ways to avoid those mistakes. It clarifies the difference between integer and fractional overflow, shows how Q notation helps track binary-point scaling, and explains why multiplies add sign bits that may require shifting. Read for concrete FPGA strategies: keeping bit growth, selective shifts, or aggressive normalization, plus testing tips.
Number Theory for Codes
If CRCs have felt like black magic, this post peels back the curtain with basic number theory and polynomial arithmetic over GF(2). It shows how fixed-width processor arithmetic becomes arithmetic in a finite field, how bit sequences are treated as polynomials, and why primitive polynomials generate every nonzero element. You also get practical insights on CRC implementation with byte tables and LFSRs.
Dealing With Fixed Point Fractions
Fixed-point fractional math is easy to botch, and this post lays out pragmatic ways to avoid those mistakes. It clarifies the difference between integer and fractional overflow, shows how Q notation helps track binary-point scaling, and explains why multiplies add sign bits that may require shifting. Read for concrete FPGA strategies: keeping bit growth, selective shifts, or aggressive normalization, plus testing tips.
Harmonic Notch Filter
A practical, DSP-friendly recipe for scrubbing 60 Hz power-line hum and its harmonics from noisy ECG and EEG recordings is presented, using IIR notch filters built from second-order all-pass sections. The post derives how to set all-pass phase to place notches and compute biquad coefficients by solving a simple 2x2 system, then shows C code and precomputed coefficients for cascading the first eight odd harmonics at a 2 kHz sample rate. Engineers get a compact, editable implementation with explicit control over notch bandwidth.
Number Theory for Codes
If CRCs have felt like black magic, this post peels back the curtain with basic number theory and polynomial arithmetic over GF(2). It shows how fixed-width processor arithmetic becomes arithmetic in a finite field, how bit sequences are treated as polynomials, and why primitive polynomials generate every nonzero element. You also get practical insights on CRC implementation with byte tables and LFSRs.
Ancient History
Technology moves fast, and the tools, platforms, and assumptions you rely on can become outdated almost overnight. In this reflective post, the author contrasts the rapid evolution of embedded development with the much slower pace of social change, from programming turnaround times to the underrepresentation of women in engineering. It is a reminder to keep learning, but also to think about how we work and who gets included.
Dealing With Fixed Point Fractions
Fixed-point fractional math is easy to botch, and this post lays out pragmatic ways to avoid those mistakes. It clarifies the difference between integer and fractional overflow, shows how Q notation helps track binary-point scaling, and explains why multiplies add sign bits that may require shifting. Read for concrete FPGA strategies: keeping bit growth, selective shifts, or aggressive normalization, plus testing tips.
Ancient History
Technology moves fast, and the tools, platforms, and assumptions you rely on can become outdated almost overnight. In this reflective post, the author contrasts the rapid evolution of embedded development with the much slower pace of social change, from programming turnaround times to the underrepresentation of women in engineering. It is a reminder to keep learning, but also to think about how we work and who gets included.
Harmonic Notch Filter
A practical, DSP-friendly recipe for scrubbing 60 Hz power-line hum and its harmonics from noisy ECG and EEG recordings is presented, using IIR notch filters built from second-order all-pass sections. The post derives how to set all-pass phase to place notches and compute biquad coefficients by solving a simple 2x2 system, then shows C code and precomputed coefficients for cascading the first eight odd harmonics at a 2 kHz sample rate. Engineers get a compact, editable implementation with explicit control over notch bandwidth.
Number Theory for Codes
If CRCs have felt like black magic, this post peels back the curtain with basic number theory and polynomial arithmetic over GF(2). It shows how fixed-width processor arithmetic becomes arithmetic in a finite field, how bit sequences are treated as polynomials, and why primitive polynomials generate every nonzero element. You also get practical insights on CRC implementation with byte tables and LFSRs.
