Should DSP Undergraduate Students Study z-Transform Regions of Convergence?
Not long ago I presented my 3-day DSP class to a group of engineers at Tektronix Inc. in Beaverton Oregon [1]. After I finished covering my material on IIR filters' z-plane pole locations and filter stability, one of the Tektronix engineers asked a question similar to:
"I noticed that you didn't discuss z-plane regions of convergence here. In my undergraduate DSP class we spent a lot of classroom and homework time on the ...
Implementing Impractical Digital Filters
This blog discusses a problematic situation that can arise when we try to implement certain digital filters. Occasionally in the literature of DSP we encounter impractical digital IIR filter block diagrams, and by impractical I mean block diagrams that cannot be implemented. This blog gives examples of impractical digital IIR filters and what can be done to make them practical.
Implementing an Impractical Filter: Example 1
Reference [1] presented the digital IIR bandpass filter...
An Astounding Digital Filter Design Application
I've recently encountered a digital filter design application that astonished me with its design flexibility, capability, and ease of use. The software is called the "ASN Filter Designer." After experimenting with a demo version of this filter design software I was so impressed that I simply had publicize it to the subscribers here on dsprelated.com.
What I Liked About the ASN Filter DesignerWith typical filter design software packages the user enters numerical values for the...
Digital PLL's -- Part 2
In Part 1, we found the time response of a 2nd order PLL with a proportional + integral (lead-lag) loop filter. Now let’s look at this PLL in the Z-domain [1, 2]. We will find that the response is characterized by a loop natural frequency ωn and damping coefficient ζ.
Having a Z-domain model of the DPLL will allow us to do three things:
Compute the values of loop filter proportional gain KL and integrator gain KI that give the desired loop natural...The Swiss Army Knife of Digital Networks
This blog describes a general discrete-signal network that appears, in various forms, inside so many DSP applications.
Figure 1 shows how the network's structure has the distinct look of a digital filter—a comb filter followed by a 2nd-order recursive network. However, I do not call this useful network a filter because its capabilities extend far beyond simple filtering. Through a series of examples I've illustrated the fundamental strength of this Swiss Army Knife of digital networks...
Digital PLL's -- Part 1
1. IntroductionFigure 1.1 is a block diagram of a digital PLL (DPLL). The purpose of the DPLL is to lock the phase of a numerically controlled oscillator (NCO) to a reference signal. The loop includes a phase detector to compute phase error and a loop filter to set loop dynamic performance. The output of the loop filter controls the frequency and phase of the NCO, driving the phase error to zero.
One application of the DPLL is to recover the timing in a digital...
Peak to Average Power Ratio and CCDF
Peak to Average Power Ratio (PAPR) is often used to characterize digitally modulated signals. One example application is setting the level of the signal in a digital modulator. Knowing PAPR allows setting the average power to a level that is just low enough to minimize clipping.
However, for a random signal, PAPR is a statistical quantity. We have to ask, what is the probability of a given peak power? Then we can decide where to set the average...
Filter a Rectangular Pulse with no Ringing
To filter a rectangular pulse without any ringing, there is only one requirement on the filter coefficients: they must all be positive. However, if we want the leading and trailing edge of the pulse to be symmetrical, then the coefficients must be symmetrical. What we are describing is basically a window function.
Consider a rectangular pulse 32 samples long with fs = 1 kHz. Here is the Matlab code to generate the pulse:
N= 64; fs= 1000; % Hz sample...Data Types for Control & DSP
There's a lot of information out there on what data types to use for digital signal processing, but there's also a lot of confusion, so the topic bears repeating.
I recently posted an entry on PID control. In that article I glossed over the data types used by showing "double" in all of my example code. Numerically, this should work for most control problems, but it can be an extravagant use of processor resources. There ought to be a better way to determine what precision you need...
PID Without a PhD
I both consult and teach in the area of digital control. Through both of these efforts, I have found that while there certainly are control problems that require all the expertise I can bring to bear, there are a great number of control problems that can be solved with the most basic knowledge of simple controllers, without resort to any formal control theory at all.
This article will tell you how to implement a simple controller in software and how to tune it without getting into heavy...
'z' as in 'Zorro': Frequency Masking FIR
An efficient way to implement FIR filters. Matlab / Octave example included. Keywords: Frequency masking FIR filter implementation
IntroductionAn "upsampled" FIR filter uses multiple-sample delays between the taps, compared to the unity delays in a conventional FIR filter. The resulting frequency response has steeper edges, but contains periodic images along the frequency axis (Fig. 1). Due to the latter, it is typically not too useful on its own.
Figure 1: Conventional and 'upsampled'...Amplitude modulation and the sampling theorem
I am working on the 11th and probably final chapter of Think DSP, which follows material my colleague Siddhartan Govindasamy developed for a class at Olin College. He introduces amplitude modulation as a clever way to sneak up on the Nyquist–Shannon sampling theorem.
Most of the code for the chapter is done: you can check it out in this IPython notebook. I haven't written the text yet, but I'll outline it here, and paste in the key figures.
Convolution...
Modeling a Continuous-Time System with Matlab
Many of us are familiar with modeling a continuous-time system in the frequency domain using its transfer function H(s) or H(jω). However, finding the time response can be challenging, and traditionally involves finding the inverse Laplace transform of H(s). An alternative way to get both time and frequency responses is to transform H(s) to a discrete-time system H(z) using the impulse-invariant transform [1,2]. This method provides an exact match to the continuous-time...
A Recipe for a Basic Trigonometry Table
Introduction
This is an article that is give a better understanding to the Discrete Fourier Transform (DFT) by showing how to build a Sine and Cosine table from scratch. Along the way a recursive method is developed as a tone generator for a pure tone complex signal with an amplitude of one. Then a simpler multiplicative one. Each with drift correction factors. By setting the initial values to zero and one degrees and letting it run to build 45 values, the entire set of values needed...
Half-band filter on Xilinx FPGA
1. DSP48 Slice in Xilinx FPGA
There are many DSP48 Slices in most Xilinx® FPGAs, one DSP48 slice in Spartan6® FPGA is shown in Figure 1, the structure may different depending on the device, but broadly similar.
Figure 1: A whole DSP48A1 Slice in Spartan6 (www.xilinx.com)
2. Symmetric Systolic Half-band FIRFigure 2: Symmetric Systolic Half-band FIR Filter
3. Two-channel Symmetric Systolic Half-band FIRFigure 3: 2-Channel...
Ten Little Algorithms, Part 6: Green’s Theorem and Swept-Area Detection
Other articles in this series:
- Part 1: Russian Peasant Multiplication
- Part 2: The Single-Pole Low-Pass Filter
- Part 3: Welford's Method (And Friends)
- Part 4: Topological Sort
- Part 5: Quadratic Extremum Interpolation and Chandrupatla's Method
This article is mainly an excuse to scribble down some cryptic-looking mathematics — Don’t panic! Close your eyes and scroll down if you feel nauseous — and...
Weighted least-squares FIR with shared coefficients
FIR design with arbitrary routing between delay line and coefficient multipliers.
Includes a commented implementation of a generic IRLS FIR design algorithm.
Introduction: Reverse EngineeringWhile looking for numerical IIR filter optimization, a Matlab program in [1] for the design of FIR filters caught my attention. The equations looked familiar, sort of, but on closer examination the pieces refused to fit together. Without the references, it took about two evenings to sort out how it...
Reducing IIR Filter Computational Workload
This blog describes a straightforward method to significantly reduce the number of necessary multiplies per input sample of traditional IIR lowpass and highpass digital filters.
Reducing IIR Filter Computations Using Dual-Path Allpass Filters
We can improve the computational speed of a lowpass or highpass IIR filter by converting that filter into a dual-path filter consisting of allpass filters as shown in Figure 1.
...Dealing With Fixed Point Fractions
Fixed point fractional representation always gives me a headache because I screw it up the first time I try to implement an algorithm. The difference between integer operations and fractional operations is in the overflow. If the representation fits in the fixed point result, you can not tell the difference between fixed point integer and fixed point fractions. When integers overflow, they lose data off the most significant bits. When fractions overflow, they lose data off...
Is It True That j is Equal to the Square Root of -1 ?
A few days ago, on the YouTube.com web site, I watched an interesting video concerning complex numbers and the j operator. The video's author claimed that the statement "j is equal to the square root of negative one" is incorrect. What he said was:
He justified his claim by going through the following exercise, starting with:
Based on the algebraic identity:
the author rewrites Eq. (1) as:
If we assume
Eq. (3) can be rewritten...
Summary of ROC Rules
This is a very short guide on how to find all possible outcomes of a system where Region of Convergence (ROC) and the original signal is not known.
Specifying the Maximum Amplifier Noise When Driving an ADC
I recently learned an interesting rule of thumb regarding the use of an amplifier to drive the input of an analog to digital converter (ADC). The rule of thumb describes how to specify the maximum allowable noise power of the amplifier [1].
The Problem Here's the situation for an ADC whose maximum analog input voltage range is –VRef to +VRef. If we drive an ADC's analog input with an sine wave whose peak amplitude is VP = VRef, the ADC's output signal to noise ratio is maximized. We'll...
Resolving 'Can't initialize target CPU' on TI C6000 DSPs - Part 2
Configuration
The previous article discussed CCS configuration. The prerequisite for the following discussion is a valid CCS configuration file. All references will be for CCS 3.3, but they may be used or adapted to other versions of CCS. From the previous discussion, we know that the configuration file is located at 'C:\CCStudio_v3.3\cc\bin\brddat\ccBrd0.dat'.
XDS510 Emulators
Initial discussion will address only XDS510 class emulators that support TI drivers and utilities. This will...
Complex Down-Conversion Amplitude Loss
This blog illustrates the signal amplitude loss inherent in a traditional complex down-conversion system. (In the literature of signal processing, complex down-conversion is also called "quadrature demodulation.")
The general idea behind complex down-conversion is shown in Figure 1(a). And the traditional hardware block diagram of a complex down-converter is shown in Figure 1(b).
Let's assume the input to our down-conversion system is an analog radio frequency (RF) signal,...
Modeling a Continuous-Time System with Matlab
Many of us are familiar with modeling a continuous-time system in the frequency domain using its transfer function H(s) or H(jω). However, finding the time response can be challenging, and traditionally involves finding the inverse Laplace transform of H(s). An alternative way to get both time and frequency responses is to transform H(s) to a discrete-time system H(z) using the impulse-invariant transform [1,2]. This method provides an exact match to the continuous-time...
60-Hz Noise and Baseline Drift Reduction in ECG Signal Processing
Electrocardiogram (ECG) signals are obtained by monitoring the electrical activity of the human heart for medical diagnostic purposes [1]. This blog describes a very efficient digital filter used to reduce both 60 Hz AC power line noise and unwanted signal baseline drift that often contaminate ECG signals.
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We'll first describe the ECG noise reduction filter and then examine the filter's performance in a real-world ECG signal filtering example.Proposed ECG Noise Reduction Digital...
Going back to Germany!
A couple of blog posts ago, I wrote that the decision to go to ESC Boston ended up being a great one for many different reasons. I came back from the conference energized and really happy that I went.
These feelings were amplified a few days after my return when I received an email from Rolf Segger, the founder of SEGGER Microcontroller (check out their very new website), asking if I would be interested in visiting their headquarters...
Resolving 'Can't initialize target CPU' on TI C6000 DSPs - Part 1
Introduction
Today I am going to discuss some of the basics that can help prevent errors that frustrate some users. The information is directed toward TI C6000 family DSPs, but much of it also applies to other TI DSPs. In many cases they represent the user's first involvement with using Code Composer Studio [CCS] and a target board. It has been my experience that the primary cause of the "Can't initialize target CPU" error message and similar messages like "Error connecting to...
FIR sideways (interpolator polyphase decomposition)
An efficient implementation of a symmetric-FIR polyphase 1:3 interpolator that doesn't follow the usual tapped delay line-paradigm. The example exploits the impulse response symmetry and avoids four multiplications out of 10. keywords: symmetric polyphase FIR filter implementation ASIC Matlab / Octave implementation
IntroductionAn interpolating FIR filter can be implemented with a single tapped delay line, possibly going forwards and backwards for a symmetric impulse response. To...
Collaborative Writing Experiment: Your Favorite DSP Websites
You are invited to contribute to the content of this blog post through the magic of Google Docs' real time collaboration feature.
I discovered this tool several months ago when I was looking for a way to coordinate our annual family halloween party (potluck) and avoid the very unpleasant situation of ending up with too much chips and not enough chocolate (first world problem!). It was amusing to keep an eye on the "food you will bring" document we had created for this and watch...
