A Recipe for a Common Logarithm Table
Cedron Dawg shows how to construct a base-10 logarithm table from scratch using only pencil-and-paper math. The recipe combines simple series for e and ln(1+x) with clever factoring and neighbor-based recurrences so minimal square-root work is required. Along the way the post explains a practical algorithm, high-accuracy interpolation and inverse-log reconstruction so you can reproduce published log tables by hand.
Sinusoidal Frequency Estimation Based on Time-Domain Samples
Rick Lyons presents three time-domain algorithms for estimating the frequency of real and complex sinusoids from samples. He shows that the Real 3-Sample and Real 4-Sample estimators, while mathematically exact, fail in the presence of noise and can produce biased or invalid outputs. The Complex 2-Sample (Lank-Reed-Pollon) estimator is more robust but can be biased at low SNR and near 0 or Fs/2, so narrowband filtering is recommended.
Three Bin Exact Frequency Formulas for a Pure Complex Tone in a DFT
Cedron Dawg derives closed-form three-bin frequency estimators for a pure complex tone in a DFT using a linear algebra view that treats three adjacent bins as a vector. He shows any vector K orthogonal to [1 1 1] yields a = (K·Z)/(K·D·Z) and derives practical K choices including a Von Hann (Pascal) kernel and a data-driven projection. The post compares estimators under noise and gives simple selection rules.
Launch of Youtube Channel: My First Videos - Embedded World 2017
Stephane Boucher turned his Embedded World 2017 trip into a debut YouTube series of short booth highlight videos. He walks through the steep learning curve of trade-show filming, the specific gear he bought and rented to cope with low light and noise, and the practical mistakes he plans to fix. The post lists filmed vendors and asks readers for feedback to improve future episodes.
A Two Bin Exact Frequency Formula for a Pure Complex Tone in a DFT
Cedron Dawg derives an exact two-bin frequency formula for a pure complex tone in the DFT, eliminating amplitude and phase to isolate frequency via a complex quotient and the complex logarithm. He presents an adjacent-bin simplification that replaces a complex multiply with a bin offset plus an atan2 angle, and discusses integer-frequency handling and aliasing. C source and numerical examples show the formula working in practice.
DFT Bin Value Formulas for Pure Complex Tones
Cedron Dawg derives closed-form DFT bin formulas for single complex exponentials, eliminating the need for brute-force summation and showing how phase acts as a uniform rotation of all bins. He also gives a Dirichlet-kernel form that yields the magnitude as (M/N)|sin(δN/2)/sin(δ/2)|, explains the large-N sinc limit, and includes C code to verify the results.
Multi-Decimation Stage Filtering for Sigma Delta ADCs: Design and Optimization
A Matlab toolbox streamlines the design and optimization of multi-stage decimation filters for sigma-delta ADCs. MSD-toolbox automates stage-count and decimation-factor selection, generates Parks-McClellan equiripple FIR coefficients, and iteratively selects coefficient quantization to meet in-band noise constraints. It accepts sigma-delta bitstream stimuli for spectral and intra-stage analysis, includes cost estimation routines, and is published open-source on MathWorks with examples and a dissertation reference.
Canonic Signed Digit (CSD) Representation of Integers
Canonic Signed Digit (CSD) encoding slashes the number of nonzero bits in integer coefficients, enabling multiplierless FIR filters implemented with shifts and adds. This post uses MATLAB code to demonstrate CSD rules, show how negative values work, and plot the distribution of signed digits as bit width changes. It finishes with practical techniques to minimize signed digits per coefficient for area and power efficient filter designs.
Frequency Translation by Way of Lowpass FIR Filtering
Rick Lyons shows how you can translate a signal down in frequency and lowpass filter it in a single operation by embedding cosine mixing values into FIR coefficients. The post explains how to build the translating FIR, how to choose the number of coefficient sets, and how decimation can dramatically reduce storage needs while noting practical constraints like the requirement that ft be an integer submultiple of fs.
Minimum Shift Keying (MSK) - A Tutorial
How does MSK achieve both excellent spectral efficiency and a constant-envelope signal suitable for nonlinear amplifiers? This tutorial builds MSK step‑by‑step from binary FSK, shows the minimum frequency spacing and continuous‑phase construction, and then recasts MSK as an OQPSK (pseudo‑symbol) representation. It finishes by generalizing MSK into CP‑FSK and the wider CPM family so you can connect practical pulse shapes and modulation indices to performance.
Angle Addition Formulas from Euler's Formula
Complex numbers are rotations and scalings in the plane, and Cedron Dawg walks through polar and Cartesian representations to make that concrete. Using Euler's formula, the article shows how multiplying complex numbers multiplies magnitudes and adds angles, and how that directly yields the sine and cosine angle-addition formulas. Practical notes cover using atan2/arg and a brief Gambas example to verify results.
Exact Frequency Formula for a Pure Real Tone in a DFT
Cedron Dawg derives an exact closed form formula to recover the frequency of a pure real sinusoid from three DFT bins, challenging the usual teaching that it is impossible. The derivation solves for cos(alpha) in a bilinear form and gives a computationally efficient implementation (eq.19), with practical notes on implicit Hann-like weighting and choosing the peak bin for robustness.
Multiplying Two Binary Numbers
Ancient math gives a modern trick for integer multiplication that uses only shifts, parity checks, and additions. Rick Lyons demonstrates the Russian peasant method, shows why it maps to binary right shifts and least-significant-bit tests, and supplies a MATLAB snippet to run the loop. The post also points out a practical tip: put the smaller operand in the halving register to reduce iterations.
Weighted least-squares FIR with shared coefficients
Markus Nentwig demonstrates how to design FIR filters that share coefficients across delay taps, allowing multiplier reuse and reduced implementation cost. He reimplements Lawson's iterative reweighted least-squares for complex-valued FIRs and provides Matlab/Octave code you can adapt for nonstandard constraints. The post explains iteration weight logic, the Toeplitz special-case with Levinson-Durbin, and practical trade-offs between multiplier count and stopband performance.
Find Aliased ADC or DAC Harmonics (with animation)
If a sinewave drives an ADC or DAC, device nonlinearities create harmonics that can fold back as aliases above Nyquist. This post shows a simple Matlab model, using an NCO, a static nonlinearity, and a DFT to generate spectra and reveal aliased harmonics, with animated illustrations to make aliasing intuitive. The approach works for both ADC and DAC measurement setups and highlights realistic effects like quantization noise.
Pentagon Construction Using Complex Numbers
A method for constructing a pentagon using a straight edge and a compass is deduced from the complex values of the Fifth Roots of Unity. Analytic values for the points are also derived.
Wavelets I - From Filter Banks to the Dilation Equation
Starting from a practical cascaded FIR filter bank, this post derives the key equations behind the Fast Wavelet Transform. It shows how conjugate-quadrature analysis and synthesis filters give perfect reconstruction and how iterating the cascade produces the scaling function, leading to the dilation equation. DB4 coefficients are used as a concrete example and a linear-system trick yields exact integer-sample values of the scaling function.
Controlling a DSP Network's Gain: A Note For DSP Beginners
Rick Lyons calls out a simple but costly mistake beginners make when normalizing digital networks, scaling the input instead of the output. Using fixed-point examples he shows that pre-multiplying an A/D output by 1/8 throws away bits and costs about 18 dB of SQNR. The practical guidance is to place gain control as the final multiplication stage and beware a faulty Simpson's 1/3 integrator example.
Free Goodies from Embedded World - What to Do Next?
Stephane Boucher went on a hunt for free stuff at Embedded World to assemble a giveaway bundle for a lucky reader. This short update shares that haul and asks the embedded community for ideas on what to do next. It is a conversational call for suggestions, aiming to turn conference swag into a useful prize.
Simple Concepts Explained: Fixed-Point
Fixed-point is the bridge between real-world values and integer arithmetic, and this post makes that bridge tangible with a hands-on ADC-to-gain example. It walks through mapping voltages to Q-format integers, choosing gain resolution in bits, and how multiplication adds bit growth and produces quantization error. Read it to build intuition for practical fixed-point choices when implementing DSP on FPGA or ASIC.
Matlab Code to Synthesize Multiplierless FIR Filters
Learn how to build multiplierless FIR lowpass filters in Matlab using Canonic Signed-Digit coefficients. The post explains converting Parks-McClellan floating-point taps to scaled integers, then to exact CSD digits, and includes two m-files that search maintap scaling to minimize signed digits while preserving the filter response. Practical notes cover external gain compensation, the 2/3 full-scale CSD limit, and sensitivity to pass/stop edges.
Online DSP Classes: Why Such a High Dropout Rate?
Rick Lyons digs into a startling statistic: online DSP courses reported a 97% dropout rate. He argues the main culprits are math-heavy curricula that overwhelm beginners and rigid, non-self-paced schedules that demand sustained 8-10+ hours per week. Rick urges course creators to rethink pacing and mathematical depth to improve completion rates and student engagement.
Resolving 'Can't initialize target CPU' on TI C6000 DSPs - Part 1
Misconfigured Code Composer Studio settings cause most 'Can't initialize target CPU' errors on TI C6000 boards, not a faulty silicon. Mike Dunn walks through the practical first steps: confirm your CCS version, identify the exact emulator and board or device part number, and ensure you have the correct emulator driver. The post also shows how to duplicate TI's factory board configuration to avoid common setup mistakes.
The Swiss Army Knife of Digital Networks
A single discrete-signal network can masquerade as a comb filter, a recursive section, or something much more versatile. Rick Lyons shows how this seven-coefficient structure can be reconfigured to realize a wide range of DSP functions, with tables of impulse responses, pole-zero plots, and frequency responses to illustrate each case. The full explanations live in the downloadable PDF, but the post gives a strong feel for why this is such a handy building block.
Adaptive Beamforming is like Squeezing a Water Balloon
Think of adaptive beamforming as squeezing a water balloon, a simple analogy that reveals how combining multiple antennas creates focused gains and deep nulls. This post walks through the MVDR (Wiener-filter–based) solution, explains steering and scanning vectors, and shows how array geometry and known signal direction control what you can and cannot cancel. Practical tips highlight limits like the N-1 interferer rule.
Discrete Wavelet Transform Filter Bank Implementation (part 2)
David Valencia walks through practical differences between the discrete wavelet transform and the discrete wavelet packet transform, showing why DWPT yields symmetric frequency resolution while DWT favors a single high-pass branch. He explains how Noble identities let you collapse multi-branch filter banks into equivalent single convolutions, then compares block convolution matrices with chain-processing and links to MATLAB code for both approaches.
Resolving 'Can't initialize target CPU' on TI C6000 DSPs - Part 2
Mike Dunn walks through practical, low-level debugging to fix "Can't initialize target CPU" on TI C6000 DSPs using CCS 3.3, focusing on XDS510-class emulators. He demonstrates how to run xdsprobe to perform JTAG resets, read and interpret adapter and port error messages, and run JTAG IR/DR integrity tests. The article shows example outputs and a simple scope-based trace to locate signal faults.
Off-Topic: A Fluidic Model of the Universe
Cedron Dawg develops a Newtonian, fluidic model where space is a compressible "fluff" and particle motion is governed by a simple refractive steering equation. He shows how rho = ln n links index, permittivity and permeability to a gravity-like potential, derives a massive-particle steering law, and works through orbit and disk solutions that produce MOND-like effects while conflicting with General Relativity. The paper highlights concrete formulas and numerics to test the hypothesis.
Feedback Controllers - Making Hardware with Firmware. Part 7. Turbo-charged DSP Oscillators
You can extract high-quality, high-sample-rate sine waves from FPGAs even when floating-point units are constrained by latency. This article compares Intel's NCO IP (multiplier option) with floating-point recursive biquads on Cyclone V and Cyclone 10 GX, and explains a boosted-sample-rate technique that pushes performance toward a 48Msps DAC target. Practical measurement results, spectral data, and resource/cost trade-offs are highlighted.
Somewhat Off Topic: Deciphering Transistor Terminology
Rick Lyons unpacks a small linguistic mystery in electronics, revealing why the transistor's middle terminal is called the "base". He traces the name to the 1949 Bell Labs "semiconductor triode", where the device sat on a metal base plate described as a large-area low-resistance contact, and notes that later transistor sandwich designs kept the name for historical reasons. The post includes original references and a few trivia nuggets.
