An Astounding Digital Filter Design Application
I've recently encountered a digital filter design application that astonished me with its design flexibility, capability, and ease of use. The software is called the "ASN Filter Designer." After experimenting with a demo version of this filter design software I was so impressed that I simply had publicize it to the subscribers here on dsprelated.com.
What I Liked About the ASN Filter DesignerWith typical filter design software packages the user enters numerical values for the...
Digital PLL's -- Part 2
In Part 1, we found the time response of a 2nd order PLL with a proportional + integral (lead-lag) loop filter. Now let’s look at this PLL in the Z-domain [1, 2]. We will find that the response is characterized by a loop natural frequency ωn and damping coefficient ζ.
Having a Z-domain model of the DPLL will allow us to do three things:
Compute the values of loop filter proportional gain KL and integrator gain KI that give the desired loop natural...The Swiss Army Knife of Digital Networks
This blog describes a general discrete-signal network that appears, in various forms, inside so many DSP applications.
Figure 1 shows how the network's structure has the distinct look of a digital filter—a comb filter followed by a 2nd-order recursive network. However, I do not call this useful network a filter because its capabilities extend far beyond simple filtering. Through a series of examples I've illustrated the fundamental strength of this Swiss Army Knife of digital networks...
Digital PLL's -- Part 1
1. IntroductionFigure 1.1 is a block diagram of a digital PLL (DPLL). The purpose of the DPLL is to lock the phase of a numerically controlled oscillator (NCO) to a reference signal. The loop includes a phase detector to compute phase error and a loop filter to set loop dynamic performance. The output of the loop filter controls the frequency and phase of the NCO, driving the phase error to zero.
One application of the DPLL is to recover the timing in a digital...
Peak to Average Power Ratio and CCDF
Peak to Average Power Ratio (PAPR) is often used to characterize digitally modulated signals. One example application is setting the level of the signal in a digital modulator. Knowing PAPR allows setting the average power to a level that is just low enough to minimize clipping.
However, for a random signal, PAPR is a statistical quantity. We have to ask, what is the probability of a given peak power? Then we can decide where to set the average...
Filter a Rectangular Pulse with no Ringing
To filter a rectangular pulse without any ringing, there is only one requirement on the filter coefficients: they must all be positive. However, if we want the leading and trailing edge of the pulse to be symmetrical, then the coefficients must be symmetrical. What we are describing is basically a window function.
Consider a rectangular pulse 32 samples long with fs = 1 kHz. Here is the Matlab code to generate the pulse:
N= 64; fs= 1000; % Hz sample...Data Types for Control & DSP
There's a lot of information out there on what data types to use for digital signal processing, but there's also a lot of confusion, so the topic bears repeating.
I recently posted an entry on PID control. In that article I glossed over the data types used by showing "double" in all of my example code. Numerically, this should work for most control problems, but it can be an extravagant use of processor resources. There ought to be a better way to determine what precision you need...
PID Without a PhD
I both consult and teach in the area of digital control. Through both of these efforts, I have found that while there certainly are control problems that require all the expertise I can bring to bear, there are a great number of control problems that can be solved with the most basic knowledge of simple controllers, without resort to any formal control theory at all.
This article will tell you how to implement a simple controller in software and how to tune it without getting into heavy...
Digital Envelope Detection: The Good, the Bad, and the Ugly
Recently I've been thinking about the process of envelope detection. Tutorial information on this topic is readily available but that information is spread out over a number of DSP textbooks and many Internet web sites. The purpose of this blog is to summarize various digital envelope detection methods in one place.
Here I focus on envelope detection as it is applied to an amplitude-fluctuating sinusoidal signal where the positive-amplitude fluctuations (the sinusoid's envelope)...
Harmonic Notch Filter
My basement is covered with power lines and florescent lights which makes collecting ECG and EEG data rather difficult due to the 60 cycle hum. I found the following notch filter to work very well at eliminating the background signal without effecting the highly amplified signals I was looking for.
The notch filter is based on the a transfer function with the form $$H(z)=\frac{1}{2}(1+A(z))$$ where A(z) is an all pass filter. The original paper [1] describes a method to...
Two Easy Ways To Test Multistage CIC Decimation Filters
This blog presents two very easy ways to test the performance of multistage cascaded integrator-comb (CIC) decimation filters [1]. Anyone implementing CIC filters should take note of the following proposed CIC filter test methods.
Introduction
Figure 1 presents a multistage decimate by D CIC filter where the number of stages is S = 3. The '↓D' operation represents downsampling by integer D (discard all but every Dth sample), n is the input time index, and m is the output time index.
Waveforms that are their own Fourier Transform
Mea Culpa
There are many scary things about writing a technical book. Can I make the concepts clear? It is worth the effort? Will it sell? But all of these pale compared to the biggest fear: What if I'm just plain wrong? Not being able to help someone is one thing, but leading them astray is far worse.
My book on DSP has now been published for almost ten years. I've found lots of typos, a few misstatements, and many places where the explanations confuse even me. But I have been lucky;...
Feedback Controllers - Making Hardware with Firmware. Part 6. Self-Calibration Related.
This article will consider the engineering of a self-calibration & self-test capability to enable the project hardware to be configured and its basic performance evaluated and verified, ready for the development of the low-latency controller DSP firmware and closed-loop applications. Performance specifications will be documented in due course, on the project website here.
- Part 6: Self-Calibration, Measurements and Signalling (this part)
- Part 5:
Some Thoughts on Sampling
Some time ago, I came across an interesting problem. In the explanation of sampling process, a representation of impulse sampling shown in Figure 1 below is illustrated in almost every textbook on DSP and communications. The question is: how is it possible that during sampling, the frequency axis gets scaled by $1/T_s$ -- a very large number? For an ADC operating at 10 MHz for example, the amplitude of the desired spectrum and spectral replicas is $10^7$! I thought that there must be...
Feedback Controllers - Making Hardware with Firmware. Part 9. Closing the low-latency loop
It's time to put together the DSP and feedback control sciences, the evaluation electronics, the Intel Cyclone floating-point FPGA algorithms and the built-in control loop test-bed and evaluate some example designs. We will be counting the nanoseconds and looking for textbook performance in the creation of emulated hardware circuits. Along the way, there is a printed circuit board (PCB) issue to solve using DSP.
Fig 1. The evaluation platform
Additional design...
How Discrete Signal Interpolation Improves D/A Conversion
This blog post is also available in pdf format. Download here.Earlier this year, for the Linear Audio magazine, published in the Netherlands whose subscribers are technically-skilled hi-fi audio enthusiasts, I wrote an article on the fundamentals of interpolation as it's used to improve the performance of analog-to-digital conversion. Perhaps that article will be of some value to the subscribers of dsprelated.com. Here's what I wrote:
We encounter the process of digital-to-analog...
Feedback Controllers - Making Hardware with Firmware. Part 3. Sampled Data Aspects
Some Design and Simulation Considerations for Sampled-Data ControllersThis article will continue to look at some aspects of the controllers and electronics needed to create emulated physical circuits with real-world connectivity and will look at the issues that arise in sampled-data controllers compared to continuous-domain controllers. As such, is not intended as an introduction to sampled-data systems.
- Part 1: Introduction
Computing Chebyshev Window Sequences
Chebyshev windows (also called Dolph-Chebyshev, or Tchebyschev windows), have several useful properties. Those windows, unlike the fixed Hanning, Hamming, or Blackman window functions, have adjustable sidelobe levels. For a given user-defined sidelobe level and window sequence length, Chebyshev windows yield the most narrow mainlobe compared to any fixed window functions.
However, for some reason, detailed descriptions of how to compute Chebyshev window sequences are not readily available...
Specifying the Maximum Amplifier Noise When Driving an ADC
I recently learned an interesting rule of thumb regarding the use of an amplifier to drive the input of an analog to digital converter (ADC). The rule of thumb describes how to specify the maximum allowable noise power of the amplifier [1].
The Problem Here's the situation for an ADC whose maximum analog input voltage range is –VRef to +VRef. If we drive an ADC's analog input with an sine wave whose peak amplitude is VP = VRef, the ADC's output signal to noise ratio is maximized. We'll...
Embedded Toolbox: Programmer's Calculator
Like any craftsman, I have accumulated quite a few tools during my embedded software development career. Some of them proved to me more useful than others. And these generally useful tools ended up in my Embedded Toolbox. In this blog, I'd like to share some of my tools with you. Today, I'd like to start with my cross-platform Programmer's Calculator called QCalc.
I'm sure that you already have your favorite calculator online or on your smartphone. But can your calculator accept...
The Discrete Fourier Transform as a Frequency Response
The discrete frequency response H(k) of a Finite Impulse Response (FIR) filter is the Discrete Fourier Transform (DFT) of its impulse response h(n) [1]. So, if we can find H(k) by whatever method, it should be identical to the DFT of h(n). In this article, we’ll find H(k) by using complex exponentials, and we’ll see that it is indeed identical to the DFT of h(n).
Consider the four-tap FIR filter in Figure 1, where each block labeled Ts represents a delay of one...
Modeling a Continuous-Time System with Matlab
Many of us are familiar with modeling a continuous-time system in the frequency domain using its transfer function H(s) or H(jω). However, finding the time response can be challenging, and traditionally involves finding the inverse Laplace transform of H(s). An alternative way to get both time and frequency responses is to transform H(s) to a discrete-time system H(z) using the impulse-invariant transform [1,2]. This method provides an exact match to the continuous-time...
A Simpler Goertzel Algorithm
In this blog I propose a Goertzel algorithm that is simpler than the version of the Goertzel algorithm that is traditionally presented DSP textbooks. Below I very briefly describe the DSP textbook version of the Goertzel algorithm followed by a description of my proposed simpler algorithm.
The Traditional DSP Textbook Goertzel Algorithm
The so-called Goertzel algorithm is used to efficiently compute a single mth-bin sample of an N-point discrete Fourier transform (DFT) [1-4]. The...
Sonos, Shut Up and Take My Money! - Is Spatial Audio Finally Here?
Although I generally agree that money can't buy happiness, I recently made a purchase that has brought me countless hours of pure joy. In this blog post, I want to share my excitement with the DSPRelated community, because I know there are many audio and music enthusiasts here, and also because I suspect there is a lot of DSP magic behind this product. And I would love to hear your opinions and experiences if you have also bought or tried the Sonos ERA 300 wireless speaker, or any other...
3 Good News
Good News #1Last week, I announced a new and ambitious reward program that will be funded by the new Vendors Directory.
This week, I am happy to announce that we have our firsts two sponsors! Quantum Leaps & Abelon Systems have agreed to pay the sponsorship fee to be listed in the new Vendors Directory. Because of their support, there is now some money in the reward pool ($1,000) and enough to pay for the firsts 500 'beers' awarded. Please...
Resolving 'Can't initialize target CPU' on TI C6000 DSPs - Part 1
Introduction
Today I am going to discuss some of the basics that can help prevent errors that frustrate some users. The information is directed toward TI C6000 family DSPs, but much of it also applies to other TI DSPs. In many cases they represent the user's first involvement with using Code Composer Studio [CCS] and a target board. It has been my experience that the primary cause of the "Can't initialize target CPU" error message and similar messages like "Error connecting to...
Live Streaming from Embedded World!
For those of you who won't be attending Embedded World this year, I will try to be your eyes and ears by video streaming live from the show floor.
I am not talking improvised streaming from a phone, but real, high quality HD streaming with a high-end camera and a device that will bond three internet connections (one wifi and two cellular) to ensure a steady, and hopefully reliable, stream. All this to hopefully give those of you who cannot be there in person a virtual...
FIR sideways (interpolator polyphase decomposition)
An efficient implementation of a symmetric-FIR polyphase 1:3 interpolator that doesn't follow the usual tapped delay line-paradigm. The example exploits the impulse response symmetry and avoids four multiplications out of 10. keywords: symmetric polyphase FIR filter implementation ASIC Matlab / Octave implementation
IntroductionAn interpolating FIR filter can be implemented with a single tapped delay line, possibly going forwards and backwards for a symmetric impulse response. To...
The Freshers Interview Guide
At Signalogic I'm in hiring mode right now, looking for a couple of entry-level engineers. After several interviews over the last few weeks I find troubling patterns... things young engineers should know, but they don't. Things they put on their resume but shouldn't, things they say or do in the interview they should not, and things they fail to say or do.
Then I see questions for "interview help" on DSP and FPGA tech groups that miss the point, asking about how to do...
Feedback Controllers - Making Hardware with Firmware. Part 9. Closing the low-latency loop
It's time to put together the DSP and feedback control sciences, the evaluation electronics, the Intel Cyclone floating-point FPGA algorithms and the built-in control loop test-bed and evaluate some example designs. We will be counting the nanoseconds and looking for textbook performance in the creation of emulated hardware circuits. Along the way, there is a printed circuit board (PCB) issue to solve using DSP.
Fig 1. The evaluation platform
Additional design...
