An s-Plane to z-Plane Mapping Example
A misleading online diagram prompted Rick Lyons to reexamine how s-plane points map to the z-plane. He spotted apparent errors in the original figure, drew a corrected mapping, and invites readers to inspect both diagrams and point out any remaining mistakes. The short post is a quick visual primer for engineers who rely on accurate s-plane to z-plane mappings in analysis and design.
Should DSP Undergraduate Students Study z-Transform Regions of Convergence?
Rick Lyons argues z-transform regions of convergence are mostly a classroom abstraction with little practical use for real-world DSP engineers. For all stable LTI impulse responses encountered in practice the ROC includes the unit circle, so DTFT and DFT exist and ROC analysis rarely affects implementation. He notes digital oscillators are a notable exception, and suggests reallocating classroom time to more practical engineering topics.
Implementing Impractical Digital Filters
Some published IIR block diagrams are impossible to implement because they contain delay-less feedback paths, and Rick Lyons shows how simple algebra fixes that. He works through two concrete examples—a bandpass built from a FIR notch and a narrowband notch using a feedback loop—and derives equivalent, implementable second-order IIR transfer functions. The post emphasizes spotting problematic loops and replacing them with practical block diagrams.
An Astounding Digital Filter Design Application
Rick Lyons was astonished by the ASN Filter Designer, a hands-on filter design tool that makes tweaking frequency responses as simple as dragging markers with your mouse. The software updates magnitude plots, z-plane pole/zero locations, and filter coefficients in real time, and it also includes a signal analyzer plus a MATLAB-like scripting language for custom coefficient generation. The post links to a demo and user guides so you can try it yourself.
Digital PLL's -- Part 2
Neil Robertson builds a Z-domain model of a second-order digital PLL with a proportional-plus-integral loop filter, then derives closed-form formulas for KL and KI from the desired loop natural frequency and damping. The post explains the s → (z - 1)/Ts approximation, shows how to form the closed-loop IIR CL(z) for step and frequency responses, and highlights when the linear Z-domain model falls short of nonlinear acquisition behavior.
The Swiss Army Knife of Digital Networks
A single discrete-signal network can masquerade as a comb filter, a recursive section, or something much more versatile. Rick Lyons shows how this seven-coefficient structure can be reconfigured to realize a wide range of DSP functions, with tables of impulse responses, pole-zero plots, and frequency responses to illustrate each case. The full explanations live in the downloadable PDF, but the post gives a strong feel for why this is such a handy building block.
Digital PLL's -- Part 1
A hands-on introduction to time-domain digital phase-locked loops, Neil Robertson builds a simple DPLL model in MATLAB and walks through the NCO, phase detector, and PI loop filter implementations. The post uses phase-in-cycles arithmetic to show how the phase accumulator, detector wrapping, and loop filter interact, and it contrasts linear steady-state behavior with the nonlinear acquisition seen when initial frequency error is large. Part 2 will cover frequency-domain tuning of the loop gains.
Peak to Average Power Ratio and CCDF
Setting digital modulator levels depends on peak-to-average power ratio, because random signals produce occasional high peaks that cause clipping. This post shows how to compute the CCDF of PAPR from a signal vector, with MATLAB code and examples for a sine wave and Gaussian noise. The examples reveal the fixed 3.01 dB PAPR of a sine and the need for large sample counts to capture rare AWGN peaks.
Filter a Rectangular Pulse with no Ringing
You can filter a rectangular pulse with no ringing simply by using an FIR whose coefficients are all positive, and make them symmetric to get identical leading and trailing edges. This post walks through a MATLAB example that convolves a normalized Hanning window with a 32-sample rectangular pulse, showing that window length controls edge duration and that shorter windows widen the spectrum. It also notes this is not a QAM pulse-shaping solution.
Data Types for Control & DSP
Control engineers often default to double precision, but Tim Wescott shows that choice can waste CPU cycles on embedded targets. He separates numeric representation into floating point, integer, and fixed-point, then walks through the tradeoffs, including quantization, overflow, and performance. A concrete PID example highlights why integrator precision and ADC scaling should drive your choice of data type rather than habit.
Errata for the book: 'Understanding Digital Signal Processing'
Rick Lyons collects all errata for every edition and printing of his book Understanding Digital Signal Processing into one centralized list, with downloadable PDFs for each variant. The post also shows how to identify your book's printing number for American 1st, 2nd, and 3rd editions and flags a few oddball versions that lack errata.
The Discrete Fourier Transform of Symmetric Sequences
Symmetric sequences arise often in digital signal processing. Examples include symmetric pulses, window functions, and the coefficients of most finite-impulse response (FIR) filters, not to mention the cosine function. Examining symmetric sequences can give us some insights into the Discrete Fourier Transform (DFT). An even-symmetric sequence is centered at n = 0 and xeven(n) = xeven(-n). The DFT of xeven(n) is real. Most often, signals we encounter start at n = 0, so they are not strictly speaking even-symmetric. We’ll look at the relationship between the DFT’s of such sequences and those of true even-symmetric sequences.
Weighted least-squares FIR with shared coefficients
Markus Nentwig demonstrates how to design FIR filters that share coefficients across delay taps, allowing multiplier reuse and reduced implementation cost. He reimplements Lawson's iterative reweighted least-squares for complex-valued FIRs and provides Matlab/Octave code you can adapt for nonstandard constraints. The post explains iteration weight logic, the Toeplitz special-case with Levinson-Durbin, and practical trade-offs between multiplier count and stopband performance.
Implementing Simultaneous Digital Differentiation, Hilbert Transformation, and Half-Band Filtering
Recently I've been thinking about digital differentiator and Hilbert transformer implementations and I've developed a processing scheme that may be of interest to the readers here on dsprelated.com.
DFT Bin Value Formulas for Pure Real Tones
Cedron Dawg derives a closed-form expression for the DFT bin values produced by a pure real sinusoid, then uses that formula to explain well known DFT behaviors. The post walks through the algebra from Euler identities to a compact computational form, highlights the integer versus non-integer frequency cases, and verifies the result with C code and printed numeric output.
Deconvolution by least squares (Using the power of linear algebra in signal processing).
When we deal with our normal discrete signal processing operations, like FIR/IIR filtering, convolution, filter design, etc. we normally think of the signals as a constant stream of numbers that we put in a sequence
A Two Bin Exact Frequency Formula for a Pure Complex Tone in a DFT
Cedron Dawg derives an exact two-bin frequency formula for a pure complex tone in the DFT, eliminating amplitude and phase to isolate frequency via a complex quotient and the complex logarithm. He presents an adjacent-bin simplification that replaces a complex multiply with a bin offset plus an atan2 angle, and discusses integer-frequency handling and aliasing. C source and numerical examples show the formula working in practice.
Feedback Controllers - Making Hardware with Firmware. Part 4. Engineering of Evaluation Hardware
This installment follows the hardware from concept to first power-up for a low-latency feedback controller and arbitrary circuit emulator. It walks through the practical engineering steps, from requirements, block diagrams, and issue tracking to component selection, simulation, PCB planning, purchasing, and staged bring-up. The result is a realistic look at how careful due diligence and a few trade-offs turned a research idea into working evaluation hardware.
What to See at Embedded World 2019
Skip the overwhelm at Embedded World 2019, Stephane Boucher lays out a practical preview of what to see and how to prioritize your time. The post helps embedded engineers focus on demos, vendor booths, and sessions that matter without getting lost on the show floor. Read it to plan a short, efficient visit that maximizes technical takeaways and networking opportunities.
How Discrete Signal Interpolation Improves D/A Conversion
Digital interpolation can drastically simplify the analog filtering that follows a DAC, lowering cost and improving output quality. Rick Lyons explains how inserting zeros and applying a digital lowpass filter (interpolation-by-two) raises the effective sample rate, reduces the DAC sin(x)/x droop, and widens the analog filter transition band. The post gives practical intuition and spectral illustrations engineers can reuse in real designs.
Resolving 'Can't initialize target CPU' on TI C6000 DSPs - Part 2
Mike Dunn walks through practical, low-level debugging to fix "Can't initialize target CPU" on TI C6000 DSPs using CCS 3.3, focusing on XDS510-class emulators. He demonstrates how to run xdsprobe to perform JTAG resets, read and interpret adapter and port error messages, and run JTAG IR/DR integrity tests. The article shows example outputs and a simple scope-based trace to locate signal faults.
Discrete Wavelet Transform Filter Bank Implementation (part 2)
David Valencia walks through practical differences between the discrete wavelet transform and the discrete wavelet packet transform, showing why DWPT yields symmetric frequency resolution while DWT favors a single high-pass branch. He explains how Noble identities let you collapse multi-branch filter banks into equivalent single convolutions, then compares block convolution matrices with chain-processing and links to MATLAB code for both approaches.
What to See at Embedded World 2019
Skip the overwhelm at Embedded World 2019, Stephane Boucher lays out a practical preview of what to see and how to prioritize your time. The post helps embedded engineers focus on demos, vendor booths, and sessions that matter without getting lost on the show floor. Read it to plan a short, efficient visit that maximizes technical takeaways and networking opportunities.
Computing Translated Frequencies in Digitizing and Downsampling Analog Bandpass Signals
Textbooks rarely give ready formulas for tracking where individual spectral lines land after bandpass sampling or decimation. Rick Lyons provides three concise equations, with Matlab code, that compute translated frequencies for analog bandpass sampling, real digital downsampling, and complex downsampling. Practical examples show how to place the sampled image at fs/4 and how to translate a complex bandpass to baseband for efficient demodulation.
A Simpler Goertzel Algorithm
Rick Lyons presents a streamlined Goertzel algorithm that simplifies computing a single DFT bin by removing the textbook method's extra shift and zero-input steps. The proposed network changes the numerator so you run the main stage N times then perform one final output stage, making the implementation cleaner and slightly cheaper computationally. Rick also points out that common textbook forms differ from Gerald Goertzel's 1958 original.
Harmonic Notch Filter
A practical, DSP-friendly recipe for scrubbing 60 Hz power-line hum and its harmonics from noisy ECG and EEG recordings is presented, using IIR notch filters built from second-order all-pass sections. The post derives how to set all-pass phase to place notches and compute biquad coefficients by solving a simple 2x2 system, then shows C code and precomputed coefficients for cascading the first eight odd harmonics at a 2 kHz sample rate. Engineers get a compact, editable implementation with explicit control over notch bandwidth.
Feedback Controllers - Making Hardware with Firmware. Part 2. Ideal Model Examples
An engineer's guide to building ideal continuous-time models for hardware emulation, using TINA Spice, MATLAB and Simulink to validate controller and circuit behavior. The article shows how a passive R-C network can be emulated by an amplifier, a current measurement and a summer, with Spice, MATLAB and Simulink producing coincident Bode responses. Small phase differences between MATLAB and Simulink are noted, and sampled-data issues are slated for the next installment.
Multimedia Processing with FFMPEG
FFMPEG is a set of libraries and a command line tool for encoding and decoding audio and video in many different formats. It is a free software project for manipulating/processing multimedia data. Many open source media players are based on FFMPEG libraries.
ESC Boston's Videos are Now Up
Stephane Boucher shares the videos he produced from ESC Boston, including a short highlight montage, a booth video for DLOGIC, and full talk clips from the conference. He also reflects on what he learned shooting on the show floor, especially the challenge of getting engineers on camera. It’s a quick behind-the-scenes look at technical event videography, with a preview of his next stop in Germany.
Filtering Noise: The Basics (Part 1)
How do you pull signals out of random noise? This post builds intuition from first principles for discrete-time white Gaussian noise and shows how simple linear FIR filtering (averaging) reduces noise. You’ll get derivations for the output mean, variance and autocorrelation, learn why the uniform moving-average minimizes noise under a unity-DC constraint, and why its sinc spectrum can be problematic. Part 1 of a short series.
