Evaluate Window Functions for the Discrete Fourier Transform
The Discrete Fourier Transform (DFT) operates on a finite length time sequence to compute its spectrum. For a continuous signal like a sinewave, you need to capture a segment of the signal in order to perform the DFT. Usually, you also need to apply a window function to the captured signal before taking the DFT [1 - 3]. There are many different window functions and each produces a different approximation of the spectrum. In this post, we’ll present Matlab code that...
Feedback Controllers - Making Hardware with Firmware. Part 10. DSP/FPGAs Behaving Irrationally
This article will look at a design approach for feedback controllers featuring low-latency "irrational" characteristics to enable the creation of physical components such as transmission lines. Some thought will also be given as to the capabilities of the currently utilized Intel Cyclone V, the new Cyclone 10 GX and the upcoming Xilinx Versal floating-point FPGAs/ACAPs.
Fig 1. Making a Transmission Line, with the Circuit Emulator
Additional...
Design a DAC sinx/x Corrector
This post provides a Matlab function that designs linear-phase FIR sinx/x correctors. It includes a table of fixed-point sinx/x corrector coefficients for different DAC frequency ranges.
A sinx/x corrector is a digital (or analog) filter used to compensate for the sinx/x roll-off inherent in the digital to analog conversion process. In DSP math, we treat the digital signal applied to the DAC is a sequence of impulses. These are converted by the DAC into contiguous pulses...
Feedback Controllers - Making Hardware with Firmware. Part 9. Closing the low-latency loop
It's time to put together the DSP and feedback control sciences, the evaluation electronics, the Intel Cyclone floating-point FPGA algorithms and the built-in control loop test-bed and evaluate some example designs. We will be counting the nanoseconds and looking for textbook performance in the creation of emulated hardware circuits. Along the way, there is a printed circuit board (PCB) issue to solve using DSP.
Fig 1. The evaluation platform
Additional design...
Digital PLL’s, Part 3 – Phase Lock an NCO to an External Clock
Sometimes you may need to phase-lock a numerically controlled oscillator (NCO) to an external clock that is not related to the system clocks of your ASIC or FPGA. This situation is shown in Figure 1. Assuming your system has an analog-to-digital converter (ADC) available, you can sync to the external clock using the scheme shown in Figure 2. This time-domain PLL model is similar to the one presented in Part 1 of this series on digital PLL’s [1]. In that PLL, we...
ADC Clock Jitter Model, Part 2 – Random Jitter
In Part 1, I presented a Matlab function to model an ADC with jitter on the sample clock, and applied it to examples with deterministic jitter. Now we’ll investigate an ADC with random clock jitter, by using a filtered or unfiltered Gaussian sequence as the jitter source. What we are calling jitter can also be called time jitter, phase jitter, or phase noise. It’s all the same phenomenon. Typically, we call it jitter when we have a time-domain representation,...
ADC Clock Jitter Model, Part 1 – Deterministic Jitter
Analog to digital converters (ADC’s) have several imperfections that affect communications signals, including thermal noise, differential nonlinearity, and sample clock jitter [1, 2]. As shown in Figure 1, the ADC has a sample/hold function that is clocked by a sample clock. Jitter on the sample clock causes the sampling instants to vary from the ideal sample time. This transfers the jitter from the sample clock to the input signal.
In this article, I present a Matlab...
Phase or Frequency Shifter Using a Hilbert Transformer
In this article, we’ll describe how to use a Hilbert transformer to make a phase shifter or frequency shifter. In either case, the input is a real signal and the output is a real signal. We’ll use some simple Matlab code to simulate these systems. After that, we’ll go into a little more detail on Hilbert transformer theory and design.
Phase ShifterA conceptual diagram of a phase shifter is shown in Figure 1, where the bold lines indicate complex...
Coefficients of Cascaded Discrete-Time Systems
In this article, we’ll show how to compute the coefficients that result when you cascade discrete-time systems. With the coefficients in hand, it’s then easy to compute the time or frequency response. The computation presented here can also be used to find coefficients of mixed discrete-time and continuous-time systems, by using a discrete time model of the continuous-time portion [1].
This article is available in PDF format for...
Design IIR Filters Using Cascaded Biquads
This article shows how to implement a Butterworth IIR lowpass filter as a cascade of second-order IIR filters, or biquads. We’ll derive how to calculate the coefficients of the biquads and do some examples using a Matlab function biquad_synth provided in the Appendix. Although we’ll be designing Butterworth filters, the approach applies to any all-pole lowpass filter (Chebyshev, Bessel, etc). As we’ll see, the cascaded-biquad design is less sensitive to coefficient...
A poor man's Simulink
Glue between Octave and NGSPICE for discrete- and continuous time cosimulation (download) Keywords: Octave, SPICE, Simulink
IntroductionMany DSP problems have close ties with the analog world. For example, a switched-mode audio power amplifier uses a digital control loop to open and close power transistors driving an analog filter. There are commercial tools for digital-analog cosimulation: Simulink comes to mind, and mainstream EDA vendors support VHDL-AMS or Verilog-A in their...
The Discrete Fourier Transform of Symmetric Sequences
Symmetric sequences arise often in digital signal processing. Examples include symmetric pulses, window functions, and the coefficients of most finite-impulse response (FIR) filters, not to mention the cosine function. Examining symmetric sequences can give us some insights into the Discrete Fourier Transform (DFT). An even-symmetric sequence is centered at n = 0 and xeven(n) = xeven(-n). The DFT of xeven(n) is real. Most often, signals we encounter start at n = 0, so they are not strictly speaking even-symmetric. We’ll look at the relationship between the DFT’s of such sequences and those of true even-symmetric sequences.
Spline interpolation
A cookbook recipe for segmented y=f(x) 3rd-order polynomial interpolation based on arbitrary input data. Includes Octave/Matlab design script and Verilog implementation example. Keywords: Spline, interpolation, function modeling, fixed point approximation, data fitting, Matlab, RTL, Verilog
IntroductionSplines describe a smooth function with a small number of parameters. They are well-known for example from vector drawing programs, or to define a "natural" movement path through given...
Design IIR Band-Reject Filters
In this post, I show how to design IIR Butterworth band-reject filters, and provide two Matlab functions for band-reject filter synthesis. Earlier posts covered IIR Butterworth lowpass [1] and bandpass [2] filters. Here, the function br_synth1.m designs band-reject filters based on null frequency and upper -3 dB frequency, while br_synth2.m designs them based on lower and upper -3 dB frequencies. I’ll discuss the differences between the two approaches later in this...
An Efficient Lowpass Filter in Octave
This article describes an efficient linear-phase lowpass FIR filter, coded using the Octave programming language. The intention is to focus on the implementation in software, but references are provided for those who wish to undertake further study of interpolated FIR filters [1]- [3].
The input signal is processed as a vector of samples (eg from a .wav file), which are converted to a matrix format. The complete filter is thus referred to as a Matrix IFIR or...
Feedback Controllers - Making Hardware with Firmware. Part 3. Sampled Data Aspects
Some Design and Simulation Considerations for Sampled-Data ControllersThis article will continue to look at some aspects of the controllers and electronics needed to create emulated physical circuits with real-world connectivity and will look at the issues that arise in sampled-data controllers compared to continuous-domain controllers. As such, is not intended as an introduction to sampled-data systems.
- Part 1: Introduction
Feedback Controllers - Making Hardware with Firmware. Part 10. DSP/FPGAs Behaving Irrationally
This article will look at a design approach for feedback controllers featuring low-latency "irrational" characteristics to enable the creation of physical components such as transmission lines. Some thought will also be given as to the capabilities of the currently utilized Intel Cyclone V, the new Cyclone 10 GX and the upcoming Xilinx Versal floating-point FPGAs/ACAPs.
Fig 1. Making a Transmission Line, with the Circuit Emulator
Additional...
Feedback Controllers - Making Hardware with Firmware. Part I. Introduction
Introduction to the topicThis is the 1st in a series of articles looking at how we can use DSP and Feedback Control Sciences along with some mixed-signal electronics and number-crunching capability (e.g. FPGA), to create arbitrary (within reason) Electrical/Electronic Circuits with real-world connectivity. Of equal importance will be the evaluation of the functionality and performance of a practical design made from modestly-priced state of the art devices.
- Part 1:
Compute Modulation Error Ratio (MER) for QAM
This post defines the Modulation Error Ratio (MER) for QAM signals, and shows how to compute it. As we’ll see, in the absence of impairments other than noise, the MER tracks the signal’s Carrier-to-Noise Ratio (over a limited range). A Matlab script at the end of the PDF version of this post computes MER for a simplified QAM-64 system.
Figure 1 is a simplified block diagram of a QAM system. The transmitter includes a source of QAM symbols, a root-Nyquist...
Canonic Signed Digit (CSD) Representation of Integers
In my last post I presented Matlab code to synthesize multiplierless FIR filters using Canonic Signed Digit (CSD) coefficients. I included a function dec2csd1.m (repeated here in Appendix A) to convert decimal integers to binary CSD values. Here I want to use that function to illustrate a few properties of CSD numbers.
In a binary signed-digit number system, we allow each binary digit to have one of the three values {0, 1, -1}. Thus, for example, the binary value 1 1...
ADC Clock Jitter Model, Part 2 – Random Jitter
In Part 1, I presented a Matlab function to model an ADC with jitter on the sample clock, and applied it to examples with deterministic jitter. Now we’ll investigate an ADC with random clock jitter, by using a filtered or unfiltered Gaussian sequence as the jitter source. What we are calling jitter can also be called time jitter, phase jitter, or phase noise. It’s all the same phenomenon. Typically, we call it jitter when we have a time-domain representation,...
Matlab Code to Synthesize Multiplierless FIR Filters
This article presents Matlab code to synthesize multiplierless Finite Impulse Response (FIR) lowpass filters.
A filter coefficient can be represented as a sum of powers of 2. For example, if a coefficient = decimal 5 multiplies input x, the output is $y= 2^2*x + 2^0*x$. The factor of $2^2$ is then implemented with a shift of 2 bits. This method is not efficient for coefficients having a lot of 1’s, e.g. decimal 31 = 11111. To reduce the number of non-zero...
Feedback Controllers - Making Hardware with Firmware. Part I. Introduction
Introduction to the topicThis is the 1st in a series of articles looking at how we can use DSP and Feedback Control Sciences along with some mixed-signal electronics and number-crunching capability (e.g. FPGA), to create arbitrary (within reason) Electrical/Electronic Circuits with real-world connectivity. Of equal importance will be the evaluation of the functionality and performance of a practical design made from modestly-priced state of the art devices.
- Part 1:
Model a Sigma-Delta DAC Plus RC Filter
Sigma-delta digital-to-analog converters (SD DAC’s) are often used for discrete-time signals with sample rate much higher than their bandwidth. For the simplest case, the DAC output is a single bit, so the only interface hardware required is a standard digital output buffer. Because of the high sample rate relative to signal bandwidth, a very simple DAC reconstruction filter suffices, often just a one-pole RC lowpass. In this article, I present a simple Matlab function that models the combination of a basic SD DAC and one-pole RC filter. This model allows easy evaluation of the overall performance for a given input signal and choice of sample rate, R, and C.
Add the Hilbert Transformer to Your DSP Toolkit, Part 1
In some previous articles, I made use of the Hilbert transformer, but did not explain its theory in any detail. In this article, I’ll dig a little deeper into how the Hilbert Transformer works. Understanding the Hilbert Transformer involves a modest amount of mathematics, but the payoff in useful applications is worth it.
As we’ll learn, a Hilbert Transformer is just a particular type of Finite Impulse Response (FIR) filter. In Part 1 of this article, I’ll...
Discrete Wavelet Transform Filter Bank Implementation (part 2)
Following the previous blog entry: http://www.dsprelated.com/showarticle/115.php
Difference between DWT and DWPTBefore getting to the equivalent filter obtention, I first want to talk about the difference between DWT(Discrete Wavelet Transform) and DWPT (Discrete Wavelet Packet Transform). The latter is used mostly for image processing.
While DWT has a single "high-pass" branch that filters the signal with the h1 filter, the DWPT separates branches symmetricaly: this means that one...
Feedback Controllers - Making Hardware with Firmware. Part 2. Ideal Model Examples
Developing and Validating Simulation ModelsThis article will describe models for simulating the systems and controllers for the hardware emulation application described in Part 1 of the series.
- Part 1: Introduction
- Part 2: Ideal Model Examples
- Part 3: Sampled Data Aspects
- Part 4: Engineering of Evaluation Hardware
- Part 5:
Modeling Anti-Alias Filters
Digitizing a signal using an Analog to Digital Converter (ADC) usually requires an anti-alias filter, as shown in Figure 1a. In this post, we’ll develop models of lowpass Butterworth and Chebyshev anti-alias filters, and compute the time domain and frequency domain output of the ADC for an example input signal. We’ll also model aliasing of Gaussian noise. I hope the examples make the textbook explanations of aliasing seem a little more real. Of course, modeling of...
Feedback Controllers - Making Hardware with Firmware. Part 3. Sampled Data Aspects
Some Design and Simulation Considerations for Sampled-Data ControllersThis article will continue to look at some aspects of the controllers and electronics needed to create emulated physical circuits with real-world connectivity and will look at the issues that arise in sampled-data controllers compared to continuous-domain controllers. As such, is not intended as an introduction to sampled-data systems.
- Part 1: Introduction
Modeling a Continuous-Time System with Matlab
Many of us are familiar with modeling a continuous-time system in the frequency domain using its transfer function H(s) or H(jω). However, finding the time response can be challenging, and traditionally involves finding the inverse Laplace transform of H(s). An alternative way to get both time and frequency responses is to transform H(s) to a discrete-time system H(z) using the impulse-invariant transform [1,2]. This method provides an exact match to the continuous-time...
