Project update-1 : Digital Filter Blocks in MyHDL and their integration in pyFDA

Sriyash Caculo June 22, 2018

This blog post presents the progress made up to week 5 in my GSoC project “Digital Filter blocks and their integration in PyFDA”. Progress was made in two areas of the project.

  • Implementation of filter blocks in MyHDL
  • Design of interface between filter blocks and PyFDA

This post will primarily discuss filter block implementation. The interface will be discussed in a later post once further progress is made.

Direct form-I FIR filter

The equation specifies the direct form I...


Linear Feedback Shift Registers for the Uninitiated, Part XVI: Reed-Solomon Error Correction

Jason Sachs June 19, 2018

Last time, we talked about error correction and detection, covering some basics like Hamming distance, CRCs, and Hamming codes. If you are new to this topic, I would strongly suggest going back to read that article before this one.

This time we are going to cover Reed-Solomon codes. (I had meant to cover this topic in Part XV, but the article was getting to be too long, so I’ve split it roughly in half.) These are one of the workhorses of error-correction, and they are used in...


Linear Feedback Shift Registers for the Uninitiated, Part XV: Error Detection and Correction

Jason Sachs June 12, 2018

Last time, we talked about Gold codes, a specially-constructed set of pseudorandom bit sequences (PRBS) with low mutual cross-correlation, which are used in many spread-spectrum communications systems, including the Global Positioning System.

This time we are wading into the field of error detection and correction, in particular CRCs and Hamming codes.

Ernie, You Have a Banana in Your Ear

I have had a really really tough time writing this article. I like the...


Who else is going to Sensors Expo in San Jose? Looking for roommate(s)!

Stephane Boucher May 29, 20186 comments

This will be my first time attending this show and I must say that I am excited. I am bringing with me my cameras and other video equipment with the intention to capture as much footage as possible and produce a (hopefully) fun to watch 'highlights' video. I will also try to film as many demos as possible and share them with you.

I enjoy going to shows like this one as it gives me the opportunity to get out of my home-office (from where I manage and run the *Related sites) and actually...


Digital PLL’s, Part 3 – Phase Lock an NCO to an External Clock

Neil Robertson May 27, 201828 comments

Sometimes you may need to phase-lock a numerically controlled oscillator (NCO) to an external clock that is not related to the system clocks of your ASIC or FPGA.  This situation is shown in Figure 1.  Assuming your system has an analog-to-digital converter (ADC) available, you can sync to the external clock using the scheme shown in Figure 2.  This time-domain PLL model is similar to the one presented in Part 1 of this series on digital PLL’s [1].  In that PLL, we...


Project introduction: Digital Filter Blocks in MyHDL and their integration in pyFDA

Sriyash Caculo May 25, 20184 comments

Hi everyone! After a lot of hesitation and several failed attempts, I have finally entered the world of blogging. A little about myself : My name is Sriyash Caculo and I’m a third year undergrad student at BITS Pilani K.K. Birla Goa Campus  pursuing a major in Electronics and Instrumentation engineering. Being an electronics engineer, I developed an interest in Digital Signal Processing and its implementation on hardware.

This blog-post is the first of many to come for the...


Two Easy Ways To Test Multistage CIC Decimation Filters

Rick Lyons May 22, 20182 comments

This blog presents two very easy ways to test the performance of multistage cascaded integrator-comb (CIC) decimation filters [1]. Anyone implementing CIC filters should take note of the following proposed CIC filter test methods.

Introduction

Figure 1 presents a multistage decimate by D CIC filter where the number of stages is S = 3. The '↓D' operation represents downsampling by integer D (discard all but every Dth sample), and n is the time index.

If the Figure 3 filter's...


ADC Clock Jitter Model, Part 2 – Random Jitter

Neil Robertson April 22, 20187 comments

In Part 1, I presented a Matlab function to model an ADC with jitter on the sample clock, and applied it to examples with deterministic jitter.  Now we’ll investigate an ADC with random clock jitter, by using a filtered or unfiltered Gaussian sequence as the jitter source.  What we are calling jitter can also be called time jitter, phase jitter, or phase noise.  It’s all the same phenomenon.  Typically, we call it jitter when we have a time-domain representation,...


Take Control of Noise with Spectral Averaging

Sam Shearman April 20, 20183 comments

Most engineers have seen the moment-to-moment fluctuations that are common with instantaneous measurements of a supposedly steady spectrum. You can see these fluctuations in magnitude and phase for each frequency bin of your spectrogram. Although major variations are certainly reason for concern, recall that we don’t live in an ideal, noise-free world. After verifying the integrity of your measurement setup by checking connections, sensors, wiring, and the like, you might conclude that the...


Linear Feedback Shift Registers for the Uninitiated, Part XIV: Gold Codes

Jason Sachs April 18, 2018

Last time we looked at some techniques using LFSR output for system identification, making use of the peculiar autocorrelation properties of pseudorandom bit sequences (PRBS) derived from an LFSR.

This time we’re going to jump back to the field of communications, to look at an invention called Gold codes and why a single maximum-length PRBS isn’t enough to save the world using spread-spectrum technology. We have to cover two little side discussions before we can get into Gold...


Goertzel Algorithm for a Non-integer Frequency Index

Rick Lyons October 7, 20135 comments

If you've read about the Goertzel algorithm, you know it's typically presented as an efficient way to compute an individual kth bin result of an N-point discrete Fourier transform (DFT). The integer-valued frequency index k is in the range of zero to N-1 and the standard block diagram for the Goertzel algorithm is shown in Figure 1. For example, if you want to efficiently compute just the 17th DFT bin result (output sample X17) of a 64-point DFT you set integer frequency index k = 17 and N =...


Waveforms that are their own Fourier Transform

Steve Smith January 16, 200812 comments

Mea Culpa 

There are many scary things about writing a technical book. Can I make the concepts clear? It is worth the effort? Will it sell? But all of these pale compared to the biggest fear: What if I'm just plain wrong? Not being able to help someone is one thing, but leading them astray is far worse.

My book on DSP has now been published for almost ten years. I've found lots of typos, a few misstatements, and many places where the explanations confuse even me. But I have been lucky;...


IIR Bandpass Filters Using Cascaded Biquads

Neil Robertson April 20, 201911 comments

In an earlier post [1], we implemented lowpass IIR filters using a cascade of second-order IIR filters, or biquads.  

This post provides a Matlab function to do the same for Butterworth bandpass IIR filters.  Compared to conventional implementations, bandpass filters based on biquads are less sensitive to coefficient quantization [2].  This becomes important when designing narrowband filters.

A biquad section block diagram using the Direct Form II structure [3,4] is...


Using Mason's Rule to Analyze DSP Networks

Rick Lyons August 31, 20096 comments

There have been times when I wanted to determine the z-domain transfer function of some discrete network, but my algebra skills failed me. Some time ago I learned Mason's Rule, which helped me solve my problems. If you're willing to learn the steps in using Mason's Rule, it has the power of George Foreman's right hand in solving network analysis problems.

This blog discusses a valuable analysis method (well known to our analog control system engineering brethren) to obtain the z-domain...


Free Goodies from Embedded World - What to Do Next?

Stephane Boucher March 6, 20193 comments

I told you I would go on a hunt for free stuff at Embedded World in order to build a bundle for someone to win.


Discrete-Time PLLs, Part 1: Basics

Reza Ameli December 1, 20159 comments

Design Files: Part1.slx

Hi everyone,

In this series of tutorials on discrete-time PLLs we will be focusing on Phase-Locked Loops that can be implemented in discrete-time signal proessors such as FPGAs, DSPs and of course, MATLAB.

In the first part of the series, we will be reviewing the basics of continuous-time baseband PLLs and we will see some useful mathematics that will give us insight into the inners working of PLLs. In the second part, we will focus on...


Instantaneous Frequency Measurement

Parth Vakil February 4, 200821 comments

I would like to talk about the oft used method of measuring the carrier frequency in the world of Signal Collection and Characterization world. It is an elegant technique because of its simplicity. But, of course, with simplicity, there come drawbacks (sometimes...especially with this one!).

In the world of Radar detection and characterization, one of the key characteristics of interest is the carrier frequency of the signal. If the radar is pulsed, you will have a very wide bandwidth, a...


Using the DFT as a Filter: Correcting a Misconception

Rick Lyons February 18, 201316 comments

I have read, in some of the literature of DSP, that when the discrete Fourier transform (DFT) is used as a filter the process of performing a DFT causes an input signal's spectrum to be frequency translated down to zero Hz (DC). I can understand why someone might say that, but I challenge that statement as being incorrect. Here are my thoughts.

Using the DFT as a Filter It may seem strange to think of the DFT as being used as a filter but there are a number of applications where this is...


Digital PLL's -- Part 2

Neil Robertson June 15, 20162 comments

In Part 1, we found the time response of a 2nd order PLL with a proportional + integral (lead-lag) loop filter.  Now let’s look at this PLL in the Z-domain [1, 2].  We will find that the response is characterized by a loop natural frequency ωn and damping coefficient ζ. 

Having a Z-domain model of the DPLL will allow us to do three things:

Compute the values of loop filter proportional gain KL and integrator gain KI that give the desired loop natural...

The Power Spectrum

Neil Robertson October 8, 2016

Often, when calculating the spectrum of a sampled signal, we are interested in relative powers, and we don’t care about the absolute accuracy of the y axis.  However, when the sampled signal represents an analog signal, we sometimes need an accurate picture of the analog signal’s power in the frequency domain.  This post shows how to calculate an accurate power spectrum.

Parseval’s theorem [1,2] is a property of the Discrete Fourier Transform (DFT) that...