Architectures for Digital Signal Processing (Wiley Series in Diagnostic and Therapeutic Radiology)
Digital signal processing (DSP) covers a wide range of applications such as signal acquisition, analysis, transmission, storage, and synthesis. Special attention is needed for the VLSI (very large scale integration) implementation of high performance DSP systems with examples from video and radar applications. This book provides basic architectures for VLSI implementations of DSP tasks covering architectures for application specific circuits and programmable DSP circuits. It fills an important gap in the literature by focusing on the transition from algorithms specification to architectures for VLSI implementations. Areas covered include: architectures for basic operations and elementary functions parallel processing and pipelining application specific array processors programmable digital signal processors With the fusion of signal processing algorithms and VLSI circuit design it will assist digital signal processing architecture developers. This book is of particular interest to electronic engineering and computer science students and will benefit practitioners of digital signal processor circuit design.
Why Read This Book
You should read this book if you need a practical bridge between DSP algorithms and real hardware: it shows how to transform filters, FFTs and other DSP kernels into pipelined, parallel and array-based VLSI implementations. You will get concrete architectural patterns, design trade-offs (area/throughput/power), and hands-on case studies that illuminate how algorithm choices affect hardware cost and performance.
Who Will Benefit
Hardware designers, ASIC/FPGA engineers, and advanced DSP engineers or graduate students who must map signal-processing algorithms (e.g., filters, FFTs) to high-performance silicon or programmable DSPs.
Level: Advanced — Prerequisites: Solid understanding of discrete-time DSP (filters, FFT, convolution), basic digital logic and digital design concepts, and familiarity with ASIC/FPGA design flows; familiarity with hardware description languages (VHDL/Verilog) and DSP processor concepts is helpful.
Key Takeaways
- Map DSP algorithms to efficient hardware datapaths using pipelining and parallelism
- Design and evaluate systolic and array processors for common DSP kernels
- Analyze and trade off throughput, latency, area and power for ASIC and programmable implementations
- Choose and architect memory and dataflow schemes to sustain high-performance DSP computations
- Apply architecture patterns to real-world cases such as FFTs, filters and video/radar processing pipelines
- Interpret how programmable DSP architectures differ from application-specific array processors and when to use each
Topics Covered
- Introduction: From Algorithms to Architectures
- Basic Computational Building Blocks (MACs, shifters, multipliers)
- Pipelining, Retiming and Parallelism Techniques
- Dataflow Models and Memory Architectures
- Systolic Arrays and Application-Specific Array Processors
- Programmable DSP Architectures and Instruction-Level Considerations
- FFT and Filter Implementation Architectures
- Mapping Algorithms to VLSI: Design Methodology
- Performance, Area and Power Trade-offs
- Case Studies: Video and Radar Application Implementations
- Design Automation and CAD Considerations
- Conclusions and Emerging Directions
Languages, Platforms & Tools
How It Compares
Covers similar ground to K. K. Parhi's 'VLSI Digital Signal Processing Systems: Design and Implementation' but Pirsch emphasizes architectural survey and trade-offs between programmable DSPs and array processors, whereas Parhi goes deeper into algorithm-to-architecture transformations and implementation techniques.
