Hi, I am using VisualDSP tools(Release version 2.2) for the SHARC processors. I am completely new to ADSP tools. I am trying to...

Hi, I am using VisualDSP tools(Release version 2.2) for the SHARC processors. I am completely new to ADSP tools. I am trying to experiment with data transfers through LinkPorts. When I tried with the LoopBack examples(both the core access and DMA access) given in the manual, I was

Hi all i am working on SHARC 21060 using VDSP++ 3.5.i have reached a stage in my project,where i have to combine various modules...

Hi all i am working on SHARC 21060 using VDSP++ 3.5.i have reached a stage in my project,where i have to combine various modules which will be invoked in sequential manner, at differnt times, in real time. how memory can be reused which has been reserved for on particulae code.

Hi, I'm using the SHARC dsp ez-kit lite with a 21065L. I can't use visualdsp++ because of the restrictions (and of course the...

Hi, I'm using the SHARC dsp ez-kit lite with a 21065L. I can't use visualdsp++ because of the restrictions (and of course the price !) My question is : somebody who worked before with a SHARC 21060 gave me his tools, and i'm not sure if they work with my kit. This tools a

Hi Vikas, > I want to use irq1 interrupt of 21060. How to initilize the interrupt >vector table? I having some trouble doing...

Hi Vikas, > I want to use irq1 interrupt of 21060. How to initilize the interrupt >vector table? I having some trouble doing this. I am putting interrupt >code inot the SEG_RTH which starts from 0x020000 which is nothing >but interrupt vector table. In

Hi, I am trying to write functions to transmit and receive data thru Linkports using DMA. As I am working on the simulator, I am...

Hi, I am trying to write functions to transmit and receive data thru Linkports using DMA. As I am working on the simulator, I am assigning same port to both the Tx and Rx Link Buffers. I am performing the following functions: 1. LAR settings to assign a port TxBuf and RxBuf.

Hi all i have recently switched to VDSP ++ 3.0 but my target board is same as earlier one. balcktip ex 21060 sharc based...

Hi all i have recently switched to VDSP ++ 3.0 but my target board is same as earlier one. balcktip ex 21060 sharc based board.also i ahve chnged my emulator to latest one which can support tiger sharc boards also. i used to collect data from serial port for more t

Hi All, Does anyone know of examples for implementing Reflective Semaphores (a reflective semaphore exists in each DSPs...

Hi All, Does anyone know of examples for implementing Reflective Semaphores (a reflective semaphore exists in each DSPs internal memory and is accessed via aliased broadcast memory space) for the ADSP-21060 (I have a quad-SHARC system). I know the ADSP21-6X Users Manual has so

Hello all, I have tested my whole codec on 21060/62 simulator environment and now want to put the code on the actual board...

Hello all, I have tested my whole codec on 21060/62 simulator environment and now want to put the code on the actual board comprising 21062. At the first stage, because I have custom board, can I use vdsp2.0 to download code through jtag interface on the boa

Hi everyone, i have implemented a Digtal PLL using SHARC ADSP 21060. i am reading 1 bit data from serial port 1 and tracking...

Hi everyone, i have implemented a Digtal PLL using SHARC ADSP 21060. i am reading 1 bit data from serial port 1 and tracking it continously. i have used chained DMA for the real time implemenation. basically Costas loop is implemented. It's working very fin

Hello Everyone, Just had a question for you relating to mapping my code into memory. Previously I had developed my code on the 21060...

Hello Everyone, Just had a question for you relating to mapping my code into memory. Previously I had developed my code on the 21060 because it had more internal memory space for my code, however now that I have finished developing the code I wanted to put it into the 21065L which is the processor I need to use. This is my problem: the seg_pmc

Hi everybody i am working on SHARC ADSP 21060.i want to use multiple DMA channels at the same time. actually i am reading...

Hi everybody i am working on SHARC ADSP 21060.i want to use multiple DMA channels at the same time. actually i am reading data thru serial port 1 in blocks of 1ms and processing this data. after every 20 ms i need to transfer 1 bit, i get after this processing.these

Hi all, I am using vdsp2.0 and SHARC-21060 processor for my codec project. I have been using .map file generated to determine...

Hi all, I am using vdsp2.0 and SHARC-21060 processor for my codec project. I have been using .map file generated to determine the memory requirements for the code. Is that approach correct. It gives something called "memory word used" and "memory wor

I've noticed that the default ldf file for the 21160 processor in VisualDSP (SP 4.1.3) includes a rather sizeable 16k memory hole...

I've noticed that the default ldf file for the 21160 processor in VisualDSP (SP 4.1.3) includes a rather sizeable 16k memory hole between the end of dmda and the start of the heap. There are similar holes found in the default ldf files for the 21060 and the 21062, but not the 21061 or the

I am re-designing the PROM boot code for a Quad-Sharc ADSP-14060 system (which has 4 ADSP-21060s). I need to perform POST and other...

I am re-designing the PROM boot code for a Quad-Sharc ADSP-14060 system (which has 4 ADSP-21060s). I need to perform POST and other functions before loading code; the boot loader is limited to 256 instructions. To do this, I have multiple 'boot loaders' and need to assign a unique

When using a compute and move instruction, is it safe to increment the same register (in the compute portion) and write the...

When using a compute and move instruction, is it safe to increment the same register (in the compute portion) and write the register to memory (in the move portion)? Example: r1 = 0x01; r4 = 4096; i4 = 0x800000; lcntr = r4, do 1 until lce r1 = r1

Greetings, We are attempting to cause a vector interrupt from DSP_B to DSP_A. We are correctly writing the address of the...

Greetings, We are attempting to cause a vector interrupt from DSP_B to DSP_A. We are correctly writing the address of the DSP_A' function from DSP_B via DSP_A's VIRPT register (using multiprocessor addressing). On DSP_A, the IRPTEN is set, the VIRPT mask bit is set, but no int

Hi!, We are trying to download a small sample program to internal memory of ADSP-21060 through JTAG (White Mountain DSP). The...

Hi!, We are trying to download a small sample program to internal memory of ADSP-21060 through JTAG (White Mountain DSP). The code is getting downloaded in the internal memory but "seg_rth" segment of Internal Memory are NOPS, hence the program counter doesn't

I worked with the White Mountain Vista ICE Emulator with the 12 ADI DSP 21060 processors. The White Mountain emulator looks...

I worked with the White Mountain Vista ICE Emulator with the 12 ADI DSP 21060 processors. The White Mountain emulator looks inconvenient but pretty stable. I'm trying to work with the same board and with the same White Mountain emulator but under the Visual DSP. The Visual DSP suppor

Hi all,     I have  a project with ADSP-21060 ( SHARC) as the processor with   Mil-1553B interface. The project...

Hi all,     I have  a project with ADSP-21060 ( SHARC) as the processor with   Mil-1553B interface. The project involves EPROM booting through the external port( through a Flash memory or EPROM )   

I plan on using a modified an ADSP-21061 EZ-KIT LITE Board to test some FLASH boot / FLASH program code (per ADI's EE-118 note)....

I plan on using a modified an ADSP-21061 EZ-KIT LITE Board to test some FLASH boot / FLASH program code (per ADI's EE-118 note). I'll be using the Summit-ICE emulator with VisualDSP and am not planning on using the provided monitor program. Can I replace the ADSP-21061 IC with