Forums Search for: ADSP-2181
serial port hang
inHi all, I was interested to read about the DSP system that hangs waiting for serial port data. I have had similar hassles with...
Hi all, I was interested to read about the DSP system that hangs waiting for serial port data. I have had similar hassles with an ADSP-2181 based system that we are designing here. Sometimes it freezes completely, other times it keeps going, but the incoming serial data turns
Hi friends
inHi, friends ineed help from you pls help me pls i am working with adsp-2181. i was studied the books given by analog devices on...
Hi, friends ineed help from you pls help me pls i am working with adsp-2181. i was studied the books given by analog devices on adsp-21xx volume-I and volume -II. any body had the code of projects published in these volumes .if any body had pls send it to me .i need these
Re: Integer multiplication and ADSP-2181
inAt 11:40 AM 12/8/99 +1100, you wrote: >Hi, > >Can some explain to me why the integer multiplication leaves >the result shifted...
At 11:40 AM 12/8/99 +1100, you wrote: >Hi, > >Can some explain to me why the integer multiplication leaves >the result shifted one bit to the left. > >if mx0 = 10h and my0 = 10h then > >ie mr = mx0 * my0 (ss) > >leaves
ADSP2181 is right platform for FS1016?
Hello Everybody, I wanted some info regarding ADSP2181 processor.I am working on FS1016(CELP). Is it possible to run this celp code on...
Hello Everybody, I wanted some info regarding ADSP2181 processor.I am working on FS1016(CELP). Is it possible to run this celp code on 2181.I tried but i couldnot get proper memory space? many suggested to run on blackfin.Moreover,I think this code is designed to work on Unix platforms,so is it possible to run on ADSP2181? I
ADSP BDMA queries
inHello everyone, hope everyone is doing fine. I'm a newbie in ADSP 218x (2181). I have strong micro-controller background .... I have some...
Hello everyone, hope everyone is doing fine. I'm a newbie in ADSP 218x (2181). I have strong micro-controller background .... I have some problems in BDMA, Please be patient to answer my simplest questions. question about BDMA are as follows: 1) Is BDMA used to download the program (that we burn in flash memory) from any flash into the DSP program memory and then ex
Re: Doubt Regarding Format Conversion in Fixed Point ADSP Processors!
inI am working with ADSP-2181 Fixed point DSP processor. We know that the multiplier in the ADSP processor accepts only 1.15...
I am working with ADSP-2181 Fixed point DSP processor. We know that the multiplier in the ADSP processor accepts only 1.15 format and the result is given as 1.31 format in the 40-bit mr register. 1.That is if we have a the equation Z = X * Y; X and Y should be in
Open drain output to serial port data input
Hello, I want to know if it is licit to connect an opn drain output from some device (W682510 voice codec by Winbond) to the RXD0 pin on...
Hello, I want to know if it is licit to connect an opn drain output from some device (W682510 voice codec by Winbond) to the RXD0 pin on serial port 0 of an ADSP-2181, and in affirmative case, which value to use for the pullup resistor. At the beginning I thought it was OK, but have not been able to make it work. DSP to codec is OK, I am generating a sinusoid from a table in the DS...
need for complete data sheet of 2181
hello I need complete data sheet of ADSP2181. What I got in the analog devices site does not speak of what to do with the pins...
hello I need complete data sheet of ADSP2181. What I got in the analog devices site does not speak of what to do with the pins not used.. iqbal Get your FREE Email and Voicemail at Lycos Communications - http://comm.ly
adsp 2181
hi.. how to make a adsp2181 assembly program bootable from PROM.. .module/ram/abs=0x0000 program; is mentioned in my...
hi.. how to make a adsp2181 assembly program bootable from PROM.. .module/ram/abs=0x0000 program; is mentioned in my program... & my architecture file describes 16k of pm ram & 16k of dm ram. i have not mentioned .mmap=0 because , by
maximum length allowed for the variable names and labels
What is the maximum length allowed for the variable names and labels for 2181 assembler in DOS version?
What is the maximum length allowed for the variable names and labels for 2181 assembler in DOS version?
dsp dm corruption when REALTEK in external loopback mode
hello friends, I have inerfaced REALTEK 8019AS to adsp 2181(BDMA). when relatek put in external loopback mode,& when the...
hello friends, I have inerfaced REALTEK 8019AS to adsp 2181(BDMA). when relatek put in external loopback mode,& when the receive interrupt is disabled(to verfiy the error path),my dsp DM locations get corrupted.(sometimes happens in internal loopback also).This happe
hip spliter file
Hello, I am doing ADSP-2181 programming. I wanted to use HIP splitter for an .exe file of my program but the codes in the hip file...
Hello, I am doing ADSP-2181 programming. I wanted to use HIP splitter for an .exe file of my program but the codes in the hip file generated are coming in reverse order i.e. from bottom to top. while if i use the boot loader routine i.e. - loader switch, the codes in bnm file are in
connection error
Hi to all I am working with the ADSP-2181(DOS version) EZ-ICE debugger. We have design a target and tries to connect with the EZ-ICE. But...
Hi to all I am working with the ADSP-2181(DOS version) EZ-ICE debugger. We have design a target and tries to connect with the EZ-ICE. But I am facing the error are 1)EZ-ICE Driver Fatal host error - 081 Executive_PC stack entry count incorrect following DSP reset. 2) Stack: Watchdog_ please reset DSP u loop address stack overflow Expecting the fee...
memory related issue
inhi i am using ADSP 2181 my application. i have interfaced EPROM with BDMA port of the processor. but now i have to increase my code size,...
hi i am using ADSP 2181 my application. i have interfaced EPROM with BDMA port of the processor. but now i have to increase my code size, with this my on chip memory is insufficient to store my code. now i want to use external SRAM to run my application. but now i am not getting that how can i store my code in SRAM so that at power on reset dsp start executing code from external memory....
Wanted Fixed Point Source Code for CELP(4.8kbps)
Hello Sir, I am just now working on CELP 4800 kbps codec.I want to do work on ADSP-2181 processor.So,Sir I wanted the Fixed Point source...
Hello Sir, I am just now working on CELP 4800 kbps codec.I want to do work on ADSP-2181 processor.So,Sir I wanted the Fixed Point source code for CELP.Please provide some info regarding it.I will be grateful to you. Thanks & Regards, Jay Bhatt __________________________________________________ "> http://mail.yahoo.com
overlay issues
hi i am new in dsp world. i am using adsp 2181 for my application. on chip memory is not sufficient for my application code. so i have used...
hi i am new in dsp world. i am using adsp 2181 for my application. on chip memory is not sufficient for my application code. so i have used software overlay for application code. but i want to know that can i used hardware overlay for same application? suppose i can use then how can i placed some application code in external RAM? how can i change my LDF to link some code in external memory?...
compatibility between adsp2181 and bf533
inHi friends ADSP 2181 and BF533 are not compatible. ADSP2181 is a 5V logic(TTL) while BF533 is a 3.3V logic device. If i need to connect...
Hi friends ADSP 2181 and BF533 are not compatible. ADSP2181 is a 5V logic(TTL) while BF533 is a 3.3V logic device. If i need to connect ADSP2181 sport to BF533 sport is it enough if i use a voltage divider for level shifting? If not which level shifter IC is ideal in this case? I need to level shift all 5 signals on ADSP2181 sport i.e DT,DR,TFS,RFS,SCK.
ADSP-2191 Host Port
I am looking at the design of a board using a ADSP-2191 connected to a host CPU via the host port. Reading the data sheet for...
I am looking at the design of a board using a ADSP-2191 connected to a host CPU via the host port. Reading the data sheet for the ADSP-2181 I see that there will be a 12~15 Thclk delay each time data is read from the host port. With a 40MHz hclk that would be a 375nS delay.
connection error
Hi to all I am working with the ADSP 2181 (DOS version) EZ-ICE debugger. We have a target board that we design. When i tries to connect...
Hi to all I am working with the ADSP 2181 (DOS version) EZ-ICE debugger. We have a target board that we design. When i tries to connect the target with the EZ-ICE debugger i will get the error the erroe are 1) EZ-ICE Driver Fatal host error - 081 Executive _PC stack entry count incorrect following DSP reset. 2) Stack : Watchdog_Please reset dsp ...
IIR filter coefficients
inHai all, Can any one send me IIR filter direct form II coefficients for this specifications for ADSP-2181 processor...
Hai all, Can any one send me IIR filter direct form II coefficients for this specifications for ADSP-2181 processor (quantised) Low pass IIR filter sampling freq. = 16000 Hz pass band freq = 1000 Hz stop band freq = 1200 Hz pass band rippl