The error message indicates that the emulator uses the external memory interface to write to external memory and fail on the verify...

The error message indicates that the emulator uses the external memory interface to write to external memory and fail on the verify operation afterwards. 1. Do you really have external memory at adress 0xC0000 .. 0xCDFFF as your LDF indicates? 2. Do you really want to pl

Rongxi, Please elaborate when you say "It failed to start if there were two 18pF capacitors connected between its crystal and ground." What...

Rongxi, Please elaborate when you say "It failed to start if there were two 18pF capacitors connected between its crystal and ground." What crystal frequency and what capacitor values have you found to work without failure? We have been having problems with ADSP-21262's in production boards occasionally failing to boot (VDSP JTAG debugger can't even connect). We changed crystal cap...

Dear all I?m new in this group and this is my first participation: I have a made home board using ADSP-21020 whit 512Kx48 program memory ....

Dear all I?m new in this group and this is my first participation: I have a made home board using ADSP-21020 whit 512Kx48 program memory . I want to write my code in this memory whit an external EEPROM programer. The problem is that I have ldr file compiled for transfer using JTAG. I?m using Visual dsp3.5 and this is the only option I can choose. How can I do to transfor this LDR fi

Hello I'm having some problems to make my code running on 2 x TS203 rev 1.2 and VisualDSP 4.0. My small code toggles FLAG0 output pin,...

Hello I'm having some problems to make my code running on 2 x TS203 rev 1.2 and VisualDSP 4.0. My small code toggles FLAG0 output pin, here are my results : 1- When simulating using TS203 : OK : I can see register FLAGREG toggling according to the code. 2- When running on TS201 eval board with the same code (via JTAG) : OK

hi, i want to design a board for adsp 2188m with minimal components .program download and debuging is done by jtag. how can i...

hi, i want to design a board for adsp 2188m with minimal components .program download and debuging is done by jtag. how can i connect serial flash with adsp2188m. any ideas. i have seen schematics of ezkit adsp2189 .it uses parallel flash

Hi, I'm disposing of a complete ADSP-218x development environment, including unregistered VisualDSP++ (R") and a full PCI SummitICE JTAG with...

Hi, I'm disposing of a complete ADSP-218x development environment, including unregistered VisualDSP++ (R") and a full PCI SummitICE JTAG with other stuff. Cost USD 1000s a few years ago - hopefully will go to a good home now... I used it for one project... http://cgi.ebay.co.uk/ws/eBayISAPI.dll?ViewItem&item=150466743035 Cheers Nick

Hi, Has anyone ever managed to use the onbard USB-based debugger interface of the EZ-KIT Lite to debug an other board ? I am wondering what...

Hi, Has anyone ever managed to use the onbard USB-based debugger interface of the EZ-KIT Lite to debug an other board ? I am wondering what it takes to make this work. Maybe just directly using the TDI TDO TCK TMS TRST lines of the EZ-KIT Lite ? There might be a kind of protection though ? or maybe not ... ? ADI provides the schematics for the EZ-KIT Lites, but of course, the USB part...

Hi Members,   I am running a project on BF53x using emulator, everything works fine for sometime and suddenly there is no...

Hi Members,   I am running a project on BF53x using emulator, everything works fine for sometime and suddenly there is no response from dsp, the status shows as still running, when i try to halt, it says JTAG SCAN failed. i could not debug as i need to close

Hi,   We are developing a new board based on TS20x, and we are adding JTAG emulator support.   We have a number...

Hi,   We are developing a new board based on TS20x, and we are adding JTAG emulator support.   We have a number of old emulators (Summit-ICE, Apex-ICE), As well as HPPCI ICE. We would like to know if anybody has experience getting an ol

Hi folks am using ADSP TS-201 Multiprocessor board. i can't load the my project file , but jtag scan is pass and VDSP environment also open...

Hi folks am using ADSP TS-201 Multiprocessor board. i can't load the my project file , but jtag scan is pass and VDSP environment also open smoothly . one processor is Master boot from the one flash . i have checked hadrware side everything its fine reset, and clock,core power signal. can any one tell right now am using some upgrade ADSP TS-201 Multiprocessor so any changes is ...

Hi, I am new to group & BF561 also. I am using BF561 customized board having SPI EPROM & FLASH mapped to 0xEF000000 I want to...

Hi, I am new to group & BF561 also. I am using BF561 customized board having SPI EPROM & FLASH mapped to 0xEF000000 I want to download boot codes to SPI FLASH using ADSP IDDE VDSP++4.5. This one is RAW board nothing is there in it. I will going to use JTAG. Please any one help me in this regards. thanks in advance, regards, Zaahir Khan

hi , we designed own target board with jtag connection. while trying to connect the emulator to target board it is showing error Error...

hi , we designed own target board with jtag connection. while trying to connect the emulator to target board it is showing error Error 0X80004005. we tried all possible ways and connections.here are the details for your consideration Processor:ADSP-BF532. Emulator-HP-USB-ICE software-VDSP++4.V some othe details : > ICE test utility run successfully for one hour. > Enable pin in em

Hi!, We are trying to download a small sample program to internal memory of ADSP-21060 through JTAG (White Mountain DSP). The...

Hi!, We are trying to download a small sample program to internal memory of ADSP-21060 through JTAG (White Mountain DSP). The code is getting downloaded in the internal memory but "seg_rth" segment of Internal Memory are NOPS, hence the program counter doesn't

I'm being asked to use the Ethernet-based Trek-ICE in place of my current -based Summit-ICE. My target is the Quad-SHARC 14060...

I'm being asked to use the Ethernet-based Trek-ICE in place of my current -based Summit-ICE. My target is the Quad-SHARC 14060 (which has four ADSP-21060s). While I had some success with the Summit-ICE, the target did 'hang' occasionally indicating JTAG loss of sync, sometimes freezing the

hi, I'm using visual dsp ++ 5.0 . i am working on sharc dsp (adsp 21062) platform. i use c language for source coding. i am making use of the...

hi, I'm using visual dsp ++ 5.0 . i am working on sharc dsp (adsp 21062) platform. i use c language for source coding. i am making use of the simulator inside the tool. (not making use of the jtag interfaces to emulate the design). can i access the ports of the dsp inside the source code. if i goto settings menu-> streams, there is an option to set the input data streams. currently i am making

I have a few questions regarding Visual DSP and the ADSP-2191. -How do you go about accessing data in other data memory pages...

I have a few questions regarding Visual DSP and the ADSP-2191. -How do you go about accessing data in other data memory pages using C/C++? -Does C take care of memory space it allocates over data memory page bounds? -In Visual DSP simulation mode, how do yo

Hello All, Recently I face the problem with USB-ICE emulator. USB-ICE emulator is working fine with TigerSharc kit but not working with...

Hello All, Recently I face the problem with USB-ICE emulator. USB-ICE emulator is working fine with TigerSharc kit but not working with Blackfin kit. Whenever working with the blackfin, JTAG Scan path test is fail in configurator(Test No 4 in configurator ). How can I resolve this issues? If anybody have some idea then kindly please help me. Thank you very much in advance!!! Regards,...

Good morning I have a problem with a BF533 EZ-KIT lite board. When I try connect my VisualDSP++ to the board, I receive the following...

Good morning I have a problem with a BF533 EZ-KIT lite board. When I try connect my VisualDSP++ to the board, I receive the following error: Core fault detected before halt at address: 0xFFEFEEE0. Attempting to reset processor. Core fault detected before halt at address: 0xFFEFEEE0. Unable to halt processor, JTAG communication failed. Possible error at address: 0xFFEFEEE0...