Hi, I'm entering the brave new world of TI DSPs from a world of (far simpler) PICs, and I'm having some difficulty building...

Hi, I'm entering the brave new world of TI DSPs from a world of (far simpler) PICs, and I'm having some difficulty building my first test circuit... I'm trying to hook up a C5501 or C6204 (haven't decided yet) with: - Micron SDRAM - Intel Flash RAM

Hi everyone! I'm an engineer student in my final year, and I want to design a digital guitar effect processor for my license project. I would use...

Hi everyone! I'm an engineer student in my final year, and I want to design a digital guitar effect processor for my license project. I would use a TMS320VC5507 DSP with PCM3060 for data conversion and processing. A 16bit SDRAM for sound looper, and PIC based user interface via I2C. I have some trouble wiring up the CODEC and the RAM to the DSP. I've read the documentations regarding McBSP and ...

Hi, I am using the Spectrum Digital DSK for C5510 The DSK has 8Mb External SDRAM and 160 K of internal memory. I am running a...

Hi, I am using the Spectrum Digital DSK for C5510 The DSK has 8Mb External SDRAM and 160 K of internal memory. I am running a small saturation function which, given a pointer and length, will saturate the words betn 0-255 Whether the pointer passed is in Internal

Hello all, I?m having a problem in setting up registers in ARM-DSP Initialization for OMAP1510 Innovator. I configured the...

Hello all, I?m having a problem in setting up registers in ARM-DSP Initialization for OMAP1510 Innovator. I configured the ARM registers like DPLL1, ARM_CLKCTL, DSPMMU and EMIFF-SDRAM(for external memory access) but I'm finding huge profiling figures differences b

hi all we have bought from you TMS320VC5509A Power Optimization DSK starter kit and when we worked on it we found that the configuration of...

hi all we have bought from you TMS320VC5509A Power Optimization DSK starter kit and when we worked on it we found that the configuration of the DSP/BIOS is not matched with the reference....for example the sdram it begins from 0x028000 in the reference but it is different for the DSP/BIOS so could you plz send me any configuration.cdb file in order to solve this problem......plz plz be as fas...

Hello: I am starting to work with assembly for the c5000 (5009). I am working on 2 buffers in the following way: ..... RPT CSR MACM *AR0+,...

Hello: I am starting to work with assembly for the c5000 (5009). I am working on 2 buffers in the following way: ..... RPT CSR MACM *AR0+, *AR1+, AC0 ..... The addresses are passed as C function parameters with AR0 and AR1. The problem is that the buffers that I am pointing with AR0 and AR1 are in an external SDRAM (addresses are longer than 16 bit), so the MAC wont work. I understa...

We designed a board based of the 5502, we have a SDRAM on CE0, and a ADC on CE1. When we try and write a value to the address space of the...

We designed a board based of the 5502, we have a SDRAM on CE0, and a ADC on CE1. When we try and write a value to the address space of the ADC, the CE1 line WONT drop. After closer inspection, CE0 wont drop either if a value is written or read from its address space. Any suggestions on why our CE's are not working?

How do I get rid of the following warning: > > warning: .hwi_disp_sec section (0x1fff8) spans page boundary: not allowed before...

How do I get rid of the following warning: > > warning: .hwi_disp_sec section (0x1fff8) spans page boundary: not allowed before CPU revision 3.0 The code is compile in large memory model (must) using the DSP//BIOS. If it is a proper solution how can the automatically generated cmd file be overriden to include a block eg. .hwi_disp_sec: block(0x20000) {} > SDRAM instead

Hello all I am trying to run two channels of G.729 vocoder on the c5502 processor. The processor is running at 300 MHz and the external SDRAM (...

Hello all I am trying to run two channels of G.729 vocoder on the c5502 processor. The processor is running at 300 MHz and the external SDRAM ( synchronous interface with the EMIF ), is running at 100 MHz. The complete code (.text) section of G.729 is placed in the external memory. All other sections like the .stack, .const, .cinit, .data are placed inside the inernal memory. I have ena...

Hi I have a custom 5502 board. I have been able to write code to it's SDRAM and execute form there. My problems (unexpectedly) are coming from...

Hi I have a custom 5502 board. I have been able to write code to it's SDRAM and execute form there. My problems (unexpectedly) are coming from flash. i can access it's flash when i burn my code in it and using flashburn i also compared the flash contents of my board versus the EVM5502 board and i found that they were the same. My GPIOs are always(before reset adn after reset i have hard...

John- > We've been developing code on a custom PCB for the 5502 chip. We > realized we needed a port expander, so we made a revision to...

John- > We've been developing code on a custom PCB for the 5502 chip. We > realized we needed a port expander, so we made a revision to our > custom board. However, now we are not able to configure the PLL to get > a CPU clock speed above 132 MHz AND have functional SDRAM interface or > peripherals. The emulation freezes when the EMIF is utilized if > PLL_DIV3 is not set to 0x8003, regardl

Hi, We've been developing code on a custom PCB for the 5502 chip. We realized we needed a port expander, so we made a revision to our custom...

Hi, We've been developing code on a custom PCB for the 5502 chip. We realized we needed a port expander, so we made a revision to our custom board. However, now we are not able to configure the PLL to get a CPU clock speed above 132 MHz AND have functional SDRAM interface or peripherals. The emulation freezes when the EMIF is utilized if PLL_DIV3 is not set to 0x8003, regardless of clock ...