Hi, I am using EVMDM642 board in Flash boot mode. I have a few doubts regarding bootloading using Flash. The bootloader stub (1 KB) is...

Hi, I am using EVMDM642 board in Flash boot mode. I have a few doubts regarding bootloading using Flash. The bootloader stub (1 KB) is copied from Flash base address 0x90000000 to the RAM address 0x0000. The bootloader stub then configures the EMIF and then copies all sections from Flash to ROM on bootup. 1) How is the EMIF configured to copy the first 1KB of bootloader stub from F...

I am a beginner of DSP. Now I use EVM2407 and DSK6713 to do the paralel communication. I use EMIF of 2x and HPI of 6x to do such work. As in...

I am a beginner of DSP. Now I use EVM2407 and DSK6713 to do the paralel communication. I use EMIF of 2x and HPI of 6x to do such work. As in the reference spra512, the HPI of 6x is mapped into the host memory space. The address pin[3:2] and address pin [1] of 2x's EMIF are connected to HCNTL[1:0] and HHWIL respectively. I want to transfer a data from 2x to 6

Hi,everyone. there are three synchronous FIFO(133MHz) in our system. two link to EMIF of C6202, and one link to XBus of C6202....

Hi,everyone. there are three synchronous FIFO(133MHz) in our system. two link to EMIF of C6202, and one link to XBus of C6202. but the chip has not glueless FIFO interface. i want to interface to FIFO as SBSRAM,but the first access to SBSRAM requies an initial stert-up penalty

Hello All, I'm trying to connect two 512Kx8bit ASRAMs (using one CE space to make a 16bit ASRAM) to the C6712C EMIF interface....

Hello All, I'm trying to connect two 512Kx8bit ASRAMs (using one CE space to make a 16bit ASRAM) to the C6712C EMIF interface. How can I write- enable them? Can I use BE0 to enable writing one SRAM and use BE1 to enable writing another SRAM instead of using the WE pin?

Hi I am new to DSP kit and we are implementing our final year degree project on it. I am facing some of very basic issues. C6713 is little...

Hi I am new to DSP kit and we are implementing our final year degree project on it. I am facing some of very basic issues. C6713 is little endain by default. We have to interface emif data pins with AD9220 (ADC) 12 bit with bit 1(MSB) and bit 12(LSB). There are 32 data pins on the emif connector. But the confusion is that which pins should be interfaced with the ADC pin 0 to pin 11 or pin 20 ...

hi, i'm testing whether can i write a data into flash??first, I build a project which is composed of a cmd file and a asm file. asm...

hi, i'm testing whether can i write a data into flash??first, I build a project which is composed of a cmd file and a asm file. asm file includes the following words EMIF_GCR .equ 0x01800000 ;EMIF global control mvkl EMIF_GCR,A4 || mvkl 0x3300,B4 mvkh EMIF_GCR,A4 || mvkh 0x3300,B4 stw B4,*A4 after I

Hye i am sending data to EMIFA on C6416. by just small piece of code while(1) { *output=0x0002136; *output=0x0000000; } ...

Hye i am sending data to EMIFA on C6416. by just small piece of code while(1) { *output=0x0002136; *output=0x0000000; } it continiously send 0002136 and 0000000 to EMIFA. i am using CE2 address to send these values on EMIFA. the problem is that EMIF clk out is 120 Mhz and data is coming out on 60 Mhz . each values remain on port for 8 clk cycles. how can i reduc...

Hi everyone! I'm a newcomer on using TI DSP. Now I'm working on a project that uses Tms320c6713 as argrithom computing unit, one ADC for...

Hi everyone! I'm a newcomer on using TI DSP. Now I'm working on a project that uses Tms320c6713 as argrithom computing unit, one ADC for acquiring signals, two DAC for outputing DSP's results. The ADC and DACs are on one piece of circuit we designed. Tms320c6713 collets data from ADC and sends data to DAC all through EMIF interface. EMIF is mapped into CE2 space and it is configued 16-bit as...

Hi everyone! I'm a newcomer on using TI DSP. Now I'm working on a project that uses Tms320c6713 as argrithom computing unit, one ADC for acquiring...

Hi everyone! I'm a newcomer on using TI DSP. Now I'm working on a project that uses Tms320c6713 as argrithom computing unit, one ADC for acquiring signals, two DAC for outputing DSP's results. The ADC and DACs are on one piece of circuit we designed. Tms320c6713 collets data from ADC and sends data to DAC all through EMIF interface. EMIF is mapped into CE2 space and it is configued 16-bit asynchr...

Dear All, I need some advice on the data transfer from the C3088 cmos camera to the 8MB SDRAM of the C6713 board EMIF. Firstly can we use the...

Dear All, I need some advice on the data transfer from the C3088 cmos camera to the 8MB SDRAM of the C6713 board EMIF. Firstly can we use the GPIO to transfer pixels to RAM or do we need to use the EMIF for DMA allocation? We need to transfer the data pixel by pixel, not frame by frame, since we have 16 YUV pins from the camera going into the board as 16 external interrupts. Can you tell...

I have refered to SPRA433D(TMS320C6000 EMIF-to-External SDRAM Interface.pdf). It's said that C620x/C670x' can interface with 1 Meg x 32...

I have refered to SPRA433D(TMS320C6000 EMIF-to-External SDRAM Interface.pdf). It's said that C620x/C670x' can interface with 1 Meg x 32 x 4 banks SDRAM .While dealing with the address shifting. The SDWID bit in SDCTL seems to tell us that C6000's EMIF only support 8-bit or 16-bit width SDRAM. So when interfacing 32-bit-width SDRAM with C6205. How can i deal

Hello We've successfully built a board based on DM642 and we've interfaced an SDRAM DIMM module to DM642 over EMIF (MTYPE: 64 bit SDRAM). Has...

Hello We've successfully built a board based on DM642 and we've interfaced an SDRAM DIMM module to DM642 over EMIF (MTYPE: 64 bit SDRAM). Has anyone tried this before. I'd like to know if there's any performance hit in using SDRAM DIMM modules versus using a standard SDRAM chips. If yes, how much. We're running DM642 at 600 MHz & SDRAM is configured at 100 MHz. Thanx & regards Gaut

Hi Everyone, I am trying to perform data transfer form a FIFO ( on a Virtex-5 FPGA ) to the DSK 6416 SDRAM using the Peripheral Device Transfer...

Hi Everyone, I am trying to perform data transfer form a FIFO ( on a Virtex-5 FPGA ) to the DSK 6416 SDRAM using the Peripheral Device Transfer available on the DSK 6416. According to XAPP753 ( Xilinx document that describes connection between FPGA and EMIF ) PDT pin is supposed to be use for interfacing with the FPGA. But *I am unable to find the PDT pin on the EMIFA. Is it an internal pin...

Hi All, I am using C64x processor. I am having 32-bit SDRAM and 16-bit FIFO as external memories which are connected to DSP...

Hi All, I am using C64x processor. I am having 32-bit SDRAM and 16-bit FIFO as external memories which are connected to DSP through EMIF. As C64x DSP has 64-bit EMIF bus width, I have connected pins D0-D31 to 32-bit data bus of SDRAM and pins D32-D47 to 16-bit data bus of

I am using TMS320C6713 DSP in my project. 1) I want to write single fix byte periodically to EMIF CE3 by using timer interrupt. 2) I want to...

I am using TMS320C6713 DSP in my project. 1) I want to write single fix byte periodically to EMIF CE3 by using timer interrupt. 2) I want to read single fix byte from EMIF CE3 at external gpio interrupt. Read and write strobe widths are 600nsec. i think processor stalls at read and write. In order to make procedure more efficient i tried to use EDMA because EDMA can read and write from ...

what is the diference between AR/W and AWE in EMIF. these signals are coming out from emifa interface (dsk6455). ...

what is the diference between AR/W and AWE in EMIF. these signals are coming out from emifa interface (dsk6455). _____________________________________

Is it possible to run the EMIF for DDR2 at speeds below 250 MHz (125M clk)? I want to interface directly to an ADC running at 100 MSPS.

Is it possible to run the EMIF for DDR2 at speeds below 250 MHz (125M clk)? I want to interface directly to an ADC running at 100 MSPS.

Hi, I was wondering if there was a way to communicate via the HPI without the emv6x or the dsk6x functions. Are there special adresses to...

Hi, I was wondering if there was a way to communicate via the HPI without the emv6x or the dsk6x functions. Are there special adresses to watch ( EMIF, pci interfacing) before starting to initialize the HPIC register of the HPI? Could anyone help me on that? Thanks very much! Terrence

I'm now trying to implement this project. Does anyone experience on it? I want to know how to configure the setting in the DSK as...

I'm now trying to implement this project. Does anyone experience on it? I want to know how to configure the setting in the DSK as EMIF is using for output data. Would anyone can provide any information about it? Thanks a lot.

Hi all, I am using CCS2.0 and spectrum digital driver for xds510pp plus emulator. I am trying to Write into the EMIF...

Hi all, I am using CCS2.0 and spectrum digital driver for xds510pp plus emulator. I am trying to Write into the EMIF registers through HPI. But it is not getting updated. How to do this?? What else I need to care??? In my set up, I have StrongARM as t