I want run SDRAM. How I modify Boot.asm, Lnk.cmd & Hex.cmd ? plz help me. MEMORY { BOOT_RAM: o = 00000000h l =...

I want run SDRAM. How I modify Boot.asm, Lnk.cmd & Hex.cmd ? plz help me. MEMORY { BOOT_RAM: o = 00000000h l = 00000800h fill = 0 IRAM: o = 00000800h l = 0000f7ffh fill = 0 CE0: o = 80000000h l = 01000000h CE1BOOT : o = 90000000h l = 0

Hello, 1. Is the usable EMIF width limited by the memory size that will be used? i.e. Can a 16MByte SDRAM be used with a 64bit...

Hello, 1. Is the usable EMIF width limited by the memory size that will be used? i.e. Can a 16MByte SDRAM be used with a 64bit EMIF? 2. Also I want to make that there will be a performance degradation if the 32bit-EMIF to 16MByte SDRAM is used in place of 64bit-EMIF to 1

Hi,??We are using a DM641-based board for our application. We are using EMIF-A ROM bootloading for booting from Flash memory. On boot-up, we are...

Hi,??We are using a DM641-based board for our application. We are using EMIF-A ROM bootloading for booting from Flash memory. On boot-up, we are copying code from the NOR Flash in CE1 space to SDRAM (100 Mhz) in CE0 and CE3 space of the DSP.? We are facing an issue during boot-up. We found that this bootloading happens correctly most of the times and the firmware is copied from Flash to SDRAM and...

Hi All! i use fir filter from the ti dsplib with CCS 2.x. I rebuild it for my version of CCS allready. The filter works fine if i place...

Hi All! i use fir filter from the ti dsplib with CCS 2.x. I rebuild it for my version of CCS allready. The filter works fine if i place input and output buffer in iram and the coefficients are in sdram. It was a accident to place the in sdram, so i wanted to benefit from the performance and changed #pragma so the array is in iram. But then the filter doesnt work anymore. I can not ...

All, I am using the eInfochips EVM6205 board to prototype a C6205 embedded system. My system must use the MAP 0 memory map which...

All, I am using the eInfochips EVM6205 board to prototype a C6205 embedded system. My system must use the MAP 0 memory map which requires booting from SDRAM located on CE0 at 0 x 0000_0000 h. I have been unable to get the EVM6205 to boot successfully into MAP 0 using the boot mode switches from power up and hard reset. The contents

Hi everybody,   I've got a problem with the DSP board we just designed, I hope you can help me on this one:   The...

Hi everybody,   I've got a problem with the DSP board we just designed, I hope you can help me on this one:   The design is mainly based on the 6711DSK, same DSP (6711 150MHz), same SDRAM family (MT48LC4M16A2-7E but CAS=2 instead of 3 on latest DSK

Hello again, Some other results of HPI boot testing. The same small DSP bootloader, which at boot is written to address 0, now is written in...

Hello again, Some other results of HPI boot testing. The same small DSP bootloader, which at boot is written to address 0, now is written in SDRAM buffer during normal application running. And results are as follows: while during the boot several words are corrupted, during simple write in SDRAM memory it is completely OK! No corrupted words. What could it be during boot that makes things w...

Hi all, I am doing a project on DSK6713 (Spectrum Digital) and using CCS V3.1 in which I need to interleave/mux voice input and data(for eg...

Hi all, I am doing a project on DSK6713 (Spectrum Digital) and using CCS V3.1 in which I need to interleave/mux voice input and data(for eg textual) and deinterleave/demux them. I have created sections in the external memory (SDRAM 16Mb) for storing the voice input, textual data and multiplexed/interleaved data. A relevant portion of the code is as follows ****** *Uint16 wavbuf[50000],tx...

Hi, My board is having C6416 processor with 16MB SDRAM. A very unexpected observation I have noted that after S/W reset the contents of the...

Hi, My board is having C6416 processor with 16MB SDRAM. A very unexpected observation I have noted that after S/W reset the contents of the SDRAM get changed, however contents of internal memory of C6416 don't change. Ideally contents of memory either external or inetrnal shall change only after H/W reset. Has anybody faced such problem before? what about EMIF settings , does they have any...

Hi I am hoping to learn more about how C64x access memory with the L1/L2 cache architecture. If I use try to read a 16-bit value...

Hi I am hoping to learn more about how C64x access memory with the L1/L2 cache architecture. If I use try to read a 16-bit value (with LDH) from a non-cached region in the external SDRAM (64-bit wide), does C64x performs a 16-bit access to the SDRAM to fetch just that value? Or does it perform 64-bit reads to get 64 bytes (L1D line size) worth of data? I

I'm going to run a large C code on C6711. THe size of the code is larger than the size of the internal memory so that I have to run ...

I'm going to run a large C code on C6711. THe size of the code is larger than the size of the internal memory so that I have to run them from the external SDRAM. Currently TI is unable to support the sample program that transfers the code in EEPROM to external SDRAM. Is there anybody

Hi all I can boot DSP via secondary boot loader successfully (code/data copy to IRAM), but my application is larger than IRAM space, so how...

Hi all I can boot DSP via secondary boot loader successfully (code/data copy to IRAM), but my application is larger than IRAM space, so how can I boot from Flash to SDRAM in C6713? Is it possible with secondary boot loader? Please guide me. Thanks Zahra

Hi, I'm developing a program for target board based on TI DSP C6211. I have to transfer a data from SDRAM to FLASH memory duing...

Hi, I'm developing a program for target board based on TI DSP C6211. I have to transfer a data from SDRAM to FLASH memory duing power down mode. I need a information about power down logic of C6211 to save the data from SDRAM to FLASH memory Thanks in advanc

Here is my code: #include #include #include "shared.h" #include #include #include #include #include #define...

Here is my code: #include #include #include "shared.h" #include #include #include #include #include #define SDRAM 0x80000000 interrupt void tx_isr(void); /* prototype the ISR */ int segid_sdram; float *x; void labmain() { segid_sdram =MEM_define((void *)SDRAM,0x01000000,NULL); x =(void *)MEM_alloc(segid_sdram,0

Hi, all In order to test pci in DM642 for my application, I wrote a simply test program. The int 13th in IER was enabled, the GIE was...

Hi, all In order to test pci in DM642 for my application, I wrote a simply test program. The int 13th in IER was enabled, the GIE was enabled. The master ok bits in PCIIE was also enabled. Then i configured a MASTER??????PCI transfer from PC to SDRAM. The masterok bit in PCIIS was set, and the right data had arrived in SDRAM(I can debug it through a PC based program). However, the dsp ca

Hello all, I'm having a problem with the DSP failing to assert HOLDA after seeing HOLD. I have a simple test program that writes 128 ...

Hello all, I'm having a problem with the DSP failing to assert HOLDA after seeing HOLD. I have a simple test program that writes 128 consecutive bytes (in 128 writes) to SDRAM. Occasionally, the DSP will not give up the bus when requested. We assert HOLD after the DSP has had the bus for 7.5uS. The problem only occurs after the code has been optimized (-O3)

Hi, I have a cypress CY7C68001 connected to CE3 and 100MHz SDRAM connected to CE0. SDRAM must run at 100MHz. CY7C68001 needs a data...

Hi, I have a cypress CY7C68001 connected to CE3 and 100MHz SDRAM connected to CE0. SDRAM must run at 100MHz. CY7C68001 needs a data write hold time of 10 ns and a address write hold time of 70ns! On a C6713 I can set WR HOLD to 3. With 100MHz ECLKIN/ECLKOUT I can only get 30ns. Any idea how I can get out of this mess without a HW change?

Hi everyone! I'm having this problem that I can't really sort out. I have a selection of large float arrays, ranging from 500 to 5000 which I...

Hi everyone! I'm having this problem that I can't really sort out. I have a selection of large float arrays, ranging from 500 to 5000 which I want to initialize on startup by including them trough a h-file. In the configuration, the section const is set to save values in SDRAM, therefore I assumed this would work: static const float my_array[5000] = {..,..,..}; //5000 float values Howe...

Hello, I am trying to do the following: store a wav file(or any other sound file from my PC) into DM642EVM SDRAM memory and play that file. I...

Hello, I am trying to do the following: store a wav file(or any other sound file from my PC) into DM642EVM SDRAM memory and play that file. I have 2 questions regarding this: A) Can I store a "wav" file into SDRAM, or it has to be some special ".dat" file? If so, is it possible to convert a wav file into a dat file ? B) According to previous threads, there are 2 ways of doing file I/O: 1...

Hi to all. I am a student and I am trying to learn using DSP with th eDSKBoard 6713. I have a problem when I declare an array ( buffer1 ) in...

Hi to all. I am a student and I am trying to learn using DSP with th eDSKBoard 6713. I have a problem when I declare an array ( buffer1 ) in SDRAM, i.e. in the section ? .my_section ?. What I have done is: #pragma DATA_SECTION(buffer1,".my_section") Int16 buffer1[500000]; Using DSP/BIOS, it creates a linker command file by default ( prova_6cfg.cmd ). To add