hi there ! i am using C6713.i have did profiling with optimization (0-3) lavel. now i want to how to calculte the data memory for context...

hi there ! i am using C6713.i have did profiling with optimization (0-3) lavel. now i want to how to calculte the data memory for context data , tables , local variable and array ? i find memory map file , but didnt get the answer. Is the varialbe in the Code size tune are the data memory ? how to find memory for tables ? in which section it is stored ? my stack memory show 0x0 to 0x1000...

Next text is produced when I use flasburn from toolbar: Req. FBTC Load FBTC Download OK Failed to get BP addr Cannot load FBTC...

Next text is produced when I use flasburn from toolbar: Req. FBTC Load FBTC Download OK Failed to get BP addr Cannot load FBTC program If I do in the way made in the example using DOS the error is WARNING: invalid option: -l WARNING: nested command file : c6713dskafxrcfg.cmd ignored WARNING: invalid option: -stack

Hi, im running a 6713 and have CCS 2.2 First I start a boot loader. This searches for a key in ext ROM and jumps at the...

Hi, im running a 6713 and have CCS 2.2 First I start a boot loader. This searches for a key in ext ROM and jumps at the code (boot_code) after the key. boot_code inits EMIF and copies code from ext ROM to int RAM. Then it jumps to to sdram_init.

Hi, I'm using NMI as power fail interrupt, to save important vars. Sometimes this didn't work. After a lot of debugging I found out why -...

Hi, I'm using NMI as power fail interrupt, to save important vars. Sometimes this didn't work. After a lot of debugging I found out why - the SP is sometimes corrupt! More debugging lead me to a linear assembly routine which is translated into code that uses the SP. IRP is saved to stack and SP is saved to IRP. As long as this code isn't interrupted all works fine. During normal op...

Hi All, along the line, some of you have been looking for add-on boards for TIs C6x DSK's. TI has now announced the...

Hi All, along the line, some of you have been looking for add-on boards for TIs C6x DSK's. TI has now announced the availability of the NDK (Networking Development Kit), that is based on the C66711 DSK, 10/100 MBit Ethernet card, and complete software support for T

Hello Experts, Iam using CCS DM642 functional Device Simulator for my H264 deocder. My code size is about 800KB. I could able to load...

Hello Experts, Iam using CCS DM642 functional Device Simulator for my H264 deocder. My code size is about 800KB. I could able to load the code properly. When I am running the code, I am getting a message calloc failed for handle. I checked with my cmd file and also increased the -heap and -stack size. The cmd file is as follows.

hi all, is there somebody who did test the performance of an algorithm? and how? i need to know the data memory requirements, stack space...

hi all, is there somebody who did test the performance of an algorithm? and how? i need to know the data memory requirements, stack space memory requirements, static memory requirements, and so on. thanks for your time. _____________________________________

I am looking for most efficient sorting algorithm tailored for c64x (if not, for any dsp). My requirements and assumptions are 1. Number of...

I am looking for most efficient sorting algorithm tailored for c64x (if not, for any dsp). My requirements and assumptions are 1. Number of elements for searching (Min, Max)= (2, 4300) 2. Data type is integer. 3. max. stack size = 4KB (if used by recursive sortings). qosrt is available in rts.src and rts64plus.lib. I have checked the qsort.c in rts.src and observed it is not optimized. U...

Good morning, I have DSKC6713 of TI and the daughter card of DSP STAR AD/DA. In the file in the CD of the daughter card there are not the example...

Good morning, I have DSKC6713 of TI and the daughter card of DSP STAR AD/DA. In the file in the CD of the daughter card there are not the example for C6713. I attach the file C6711.c -q -cr -m da_intr_sine.map -o da_intr_sine.out -stack 0x0800 -x /* Memory for TMS320C6x11 */ MEMORY { IDRAM : origin = 0x00000000,len = 0x00010000 } SECTIONS { .vectors: {} > IDRAM

my link.cmd is ok in ccs2.2 but in ccs3.3 there is an error -c -heap 0x01 -stack 0x1000 -l rts6700.lib MEMORY { IRAM : origin =...

my link.cmd is ok in ccs2.2 but in ccs3.3 there is an error -c -heap 0x01 -stack 0x1000 -l rts6700.lib MEMORY { IRAM : origin = 0x400, len = 0x2fc00 CACHE_L2 : origin = 0x30000, len = 0x10000 BOOT_RAM : origin = 0x0, len = 0x400 SDRAM : origin = 0x80000000, len = 0x1000000 } SECTIONS { .boot_load > BOOT_RAM .vectors

I have a project running on a 6713 processor, with a megabyte of external sram. I am not running the TI BIOS. I'm running Code Composer...

I have a project running on a 6713 processor, with a megabyte of external sram. I am not running the TI BIOS. I'm running Code Composer Studio 3.1.23. My code, data, and stack is larger than 256k, so I have been running with the cache enabled, reducing the available internal ram on the DSP to 192k. The cache is configured to run on my entire external memory range. I have set things ...

Hi all , my project is to implement embedded linux on TMS320C67X . Anybody knows how to implement TCP/IP stack on DSP ,...

Hi all , my project is to implement embedded linux on TMS320C67X . Anybody knows how to implement TCP/IP stack on DSP , any suggestions ideas where to start .?????????

Shiv- > when I profiled my application it is taking 85% of time for L1D stalls > in DM6446. I am using , text and heap sections in SDRAM and...

Shiv- > when I profiled my application it is taking 85% of time for L1D stalls > in DM6446. I am using , text and heap sections in SDRAM and other data > sections in L2 Ram/CACHE. How to solve these L1D Stalls issue, though > i am not using L1D at all. First, I would suggest that stack, heap, and time-crucial code (.text) sections be placed in onchip RAM, not SDRAM. Second, the way you