The changing of sampling rate of AD1819A

Started by Marek in comp.dsp17 years ago 4 replies

Hello, everybody. I'm just a beginner. I use ADSP-21065L SHARC EZ-KIT Lite where is codec AD1819A. The default sampling rate is 48 kHz and I need...

Hello, everybody. I'm just a beginner. I use ADSP-21065L SHARC EZ-KIT Lite where is codec AD1819A. The default sampling rate is 48 kHz and I need to change it. But it's so difficult for me to do it. I would like to change it for example from 48 kHz to 8 kHz. Please help me if you can. Thank you very much Marek The code: /*---------------------------------------------------------------------...


sharc adsp21061 ez-kit and memory mapped I/O?

Started by Theron Hicks in comp.dsp18 years ago 6 replies

Hello, I have a sharc adsp-21061 ez-kit board and I would like to make two changes to it. The first change is to use the second serial...

Hello, I have a sharc adsp-21061 ez-kit board and I would like to make two changes to it. The first change is to use the second serial port to talk to a different A/D. The problem with the A/D on the card is that it wants to be AC coupled. I need DC data. So I plan on hooking up an AD974 or AD977 to the second serial port. Does anyone see a problem here? The second problem i...


eig function in DSP

Started by Laplace in comp.dsp14 years ago 3 replies

Hi! I'm working with an algorithm that uses eig matlab's function. I'm now writing this code in C. I read about eig() function and I think...

Hi! I'm working with an algorithm that uses eig matlab's function. I'm now writing this code in C. I read about eig() function and I think that doing it by hand may be difficult... do you know any library that has this function or a easy way to translate it from Matlab to C? I'm working with ADSP 21369. Thanks!


Finding the right DSP evaluation board

Started by Zach R. in comp.dsp18 years ago 2 replies

Hi everyone, I am looking for a floating point evaluation board that has easy audio inputs (such as rca or 3.5mm jacks) and a SAR adc. I...

Hi everyone, I am looking for a floating point evaluation board that has easy audio inputs (such as rca or 3.5mm jacks) and a SAR adc. I have almost exactly what I want in the ADSP BF533 but I am getting a group delay due to the sigma-delta converter. Some of you on here let me know that I needed to use a SAR adc for feedback control applications. So I need to find a new evaluation boar...


Switch from ADSP-218X to Blackfin?

Started by kansas_ray in comp.dsp18 years ago 16 replies

We have been using the 218X parts (quite satisfactorily) but are considering tooling up for the Blackfin. This is a big step for us because it...

We have been using the 218X parts (quite satisfactorily) but are considering tooling up for the Blackfin. This is a big step for us because it involves shelling out $4300 for an emulator and VisualDSP++ software. Hardware-wise the 218X family still services our needs and price-wise still competes with the Blackfin parts. Of course the distributors and reps say now is the time to move. An...


Visual Programming inetrface for SHARCs

Started by kmap in comp.dsp15 years ago 2 replies

Hello! I was wondering whether there is a tool to graphically program the Analog Devices SHARC processor. The SigmaStudio tool does not seem...

Hello! I was wondering whether there is a tool to graphically program the Analog Devices SHARC processor. The SigmaStudio tool does not seem to be available for the processor I have (it is on the EZ-Kit Lite for the ADSP-2136x SHARC processor family). All it has included in the package is Visual DSP++. In particular, I would like your suggestion for a tool which allows making custom blo...


Question regarding VisualDSP++ 4.0

Started by Anonymous in comp.dsp16 years ago 1 reply

HI guys, I am working on project involving adsp-21160 and I am using VisualDSP++ 4.0. At my main file I have setup both the corresponding DMA...

HI guys, I am working on project involving adsp-21160 and I am using VisualDSP++ 4.0. At my main file I have setup both the corresponding DMA channels (DMA chaining) for receiving (SPORT0) and transmiting (SPORT1) and SPORTs. I have setup the streams in order to simulate I/O: Source Target Destination Target TX1 File(outpu...


Sampling Time Difference in OFDM Demodulator

Started by insecuritate in comp.dsp15 years ago 5 replies

Dear all, in my diploma thesis i am realizing an ofdm modem. i am working with two adsp bf533 ez-kit-lites. one as transmitter and one as...

Dear all, in my diploma thesis i am realizing an ofdm modem. i am working with two adsp bf533 ez-kit-lites. one as transmitter and one as receiver. for d/a and a/d conversion i use the implemented audio codec. this works with nominally 48khz. and here is my problem. these 48khz are only a nominally value. the "real" values differ slightly. after receiving my ofdm signal and detecting the sta...


Anybody using compression option for blackfin loader?

Started by Andre in comp.dsp13 years ago

Hi VDSP-Experts, I am trying to use the "compression" feature of the loader on the BF533 with VDSP5.0 update 4. I have ticked "enable...

Hi VDSP-Experts, I am trying to use the "compression" feature of the loader on the BF533 with VDSP5.0 update 4. I have ticked "enable compression" in project options and selected a zlib init file in load/options. The only thing I modified from the default one (ADSP-BF533_zlib_init_SDRAM.dxe) is the SDRAM bank control register, which I set to my configuration (0x11, using 16MByte). I...


Misaligned Memory Exception in ADSP-TS201

Started by deepak in comp.dsp16 years ago 7 replies

Hi I am trying to port some code from C++ to DSP. I have a packer unpacker class which reads and initializes data from a buffer. I am...

Hi I am trying to port some code from C++ to DSP. I have a packer unpacker class which reads and initializes data from a buffer. I am using 64 bit precision for doubles and 32 bit addressing scheme. when i try to load a 64 bit double from a odd address in the buffer it gives me this misaligned memory exception. has someone encountered this problem before .... i would appreciate a...


newbie h/w memory help, sharc dsp

Started by omal...@gmail.com in comp.dsp16 years ago 5 replies

Hi, I'm creating a guitar effects system using the new generation of Analog Devices SHARC board (ADSP-21364 to be precise). I am sampling...

Hi, I'm creating a guitar effects system using the new generation of Analog Devices SHARC board (ADSP-21364 to be precise). I am sampling at 48kHz and have created a buffer of 30,000 samples to create an echo effect. This all works fine, however when I increase the buffer size any more there isn't enough internal memory left to facilitate the buffer. Using VisualDSP++'s very handy ex...


ADSP 21160 and sport transmit

Started by Bhaskar Thiagarajan in comp.dsp18 years ago 4 replies

Hi all I need some suggestions on how to handle my problem (I believe there is more than 1 solution). I have data coming in at a certain...

Hi all I need some suggestions on how to handle my problem (I believe there is more than 1 solution). I have data coming in at a certain rate, say fs. This is DMA-ed into internal memory (using chained sport receive) in blocks of 100. (so each of my ping-pong buffer is 100 samples deep). Every time one buffer fills up, I start processing the data and generate outputs. My processing is a f...


21161 SHARC SIMD questions

Started by Jon Harris in comp.dsp18 years ago 12 replies

I have a few questions about SIMD memory accesses on the ADSP-21161N. It seems to me the documentation is confusing or incomplete. 1. I am...

I have a few questions about SIMD memory accesses on the ADSP-21161N. It seems to me the documentation is confusing or incomplete. 1. I am confused about the broadcast load feature. Referring to the Hardware Reference page 5-40, it states, "broadcast loading only influences writes to registers and write identical data to these registers." But then, on the next page in Table 5-41, a footn...


Soft and hard filter length

Started by manlightman in comp.dsp6 years ago 4 replies

Hi guys, I'm currently working with an AD ADSP-21489 processor. This generation has 3 destict hardware accelerators which can perform fft fir...

Hi guys, I'm currently working with an AD ADSP-21489 processor. This generation has 3 destict hardware accelerators which can perform fft fir and iir computations. Skipping through the manual, I came across the terms "soft" and "hard" filter length in the FIR chapter. Can someone enlighten me? Is this basic knowlege? greets Pete --------------------------------------- Posted throu...


adsp 21161 ifft problem

Started by Klaus Koch in comp.dsp18 years ago 3 replies

Hi, I'm working with a Analog Devices 21161 EZKIT board. I'm a beginner on the dsp subject and having problems with fft / inverse fft. I...

Hi, I'm working with a Analog Devices 21161 EZKIT board. I'm a beginner on the dsp subject and having problems with fft / inverse fft. I used the talkthrough - example provided with the visual dsp environment to fill a buffer with the audio signal coming from line-in input. After filling it, it will be repeated infinite. My idea now was to fft this buffer after it has been filled an...


adsp 2101 SR = SR OR LSHIFT SI BY 8 (LO) what does this mean

Started by megawoody in comp.dsp15 years ago 2 replies

Hi seasoned users io_read: m4=0; l4=0; si = pm(i4,m4); sr0 = px; sr = sr or lshift si by 8 (lo); ax0 = sr0; rts; Is my description...

Hi seasoned users io_read: m4=0; l4=0; si = pm(i4,m4); sr0 = px; sr = sr or lshift si by 8 (lo); ax0 = sr0; rts; Is my description rite or wrong!! bit23 to bit8 is loaded into the si register. px which contains bit7 to bit0 si loaded into sr0. si is ored with sr0 and then it is shifted left 8 positions. ax0 is loaded with sr0 and it is used by calling routine. this means that t...


Please, I need a help with FIR/LMS using SIMD adsp 21161

Started by hbarcellos in comp.dsp13 years ago 3 replies

Hello all, I work with ADSP21161N... my research is about Active Noise Control... I'll try explain my problem... I've a file, with the...

Hello all, I work with ADSP21161N... my research is about Active Noise Control... I'll try explain my problem... I've a file, with the samples (160 samples - 48Khz of sample frequency) of a 300hz signal, I use that file and circular buffer to generate the signal, and than I send that signal to the output... My project is similiar a example SIMD_FIR in analog device site... I'm using a FIR...


why are LMS coefficients wandering away?

Started by JohnPower in comp.dsp10 years ago 2 replies

Hi guys, For my master's thesis I'm currently trying to implement an active noise cancellation (ANC) system on a ADSP-21369 EZ-KIT Lite....

Hi guys, For my master's thesis I'm currently trying to implement an active noise cancellation (ANC) system on a ADSP-21369 EZ-KIT Lite. I've chosen the Normalized Leaky LMS algorithm to update (451) coefficients of a FIR filter. In contrast to conventional ANC Systems, the noise I'm trying to suppress is highly repetitive and I have a trigger signal which fires on each repetition. So what...


why are LMS coefficients wandering away?

Started by JohnPower in comp.dsp10 years ago 13 replies

Hi guys, For my master's thesis I'm currently trying to implement an active noise cancellation (ANC) system on a ADSP-21369 EZ-KIT Lite....

Hi guys, For my master's thesis I'm currently trying to implement an active noise cancellation (ANC) system on a ADSP-21369 EZ-KIT Lite. I've chosen the Normalized Leaky LMS algorithm to update (451) coefficients of a FIR filter. In contrast to conventional ANC Systems, the noise I'm trying to suppress is highly repetitive and I have a trigger signal which fires on each repetition. So what...


Software Defined Radio DSP choice / sizing

Started by Anonymous in comp.dsp14 years ago 15 replies

I'm working on a SDR design using the AD9874 to digitize the IF producing 280 Ksamples/sec and am trying to size the DSP. I'm leaning...

I'm working on a SDR design using the AD9874 to digitize the IF producing 280 Ksamples/sec and am trying to size the DSP. I'm leaning towards the ADSP-BF532 which is a fixed point DSP rated at 400 MIPS / 800 MMACS and is available in a LQFP package. I'd like to be able to handle everything from decoding standard shortwave SSB signals to broadcast FM stereo signals (including RDS). 1) A...