Re: Software PLL (SPLL)

Started by Ken Smith in comp.dsp13 years ago

In article , Ron N. wrote: > Tim Wescott wrote: > > Implementing a PLL in software uses the same basic theory as > > implementing a PLL...

In article , Ron N. wrote: > Tim Wescott wrote: > > Implementing a PLL in software uses the same basic theory as > > implementing a PLL in hardware -- you compare your synthesized signal to > > a reference, generate a phase difference, then servo the frequency of > > your synthesized signal to your reference. > > Why? I


Digital phase/frequency detector

Started by Vladimir Vassilevsky in comp.dsp11 years ago 4 replies
PLL

There is a software PLL with a hardware phase detector. The phase detector is done in that way so it outputs the phase difference (+/- Pi) and...

There is a software PLL with a hardware phase detector. The phase detector is done in that way so it outputs the phase difference (+/- Pi) and the absolute frequency difference at the same time. What could be the best use for the phase and the frequency information in the PLL ? It is desired to have the guaranteed PLL pull in with the minimal wander in the locked state. I could think of the...


Software PLL

Started by smc123 in comp.dsp9 years ago 10 replies

I'm looking for guidance on writing a software PLL for a signal acquired from a data acquisition board: The daq board will be sampling at...

I'm looking for guidance on writing a software PLL for a signal acquired from a data acquisition board: The daq board will be sampling at 10kSPS. The signals to which I'd like to lock on to are from 5Hz to 1kHz, sine or square wave. The output of the PLL will be used to multiply a signal acquired on an adjacent channel of the daq board. Lock-in amplifier application. The processing of the sig...


Low Pass Filter for a PLL

Started by JAlbertoDJ in comp.dsp9 years ago 2 replies
PLL

Hi all. I have done a PLL for tracking frecuency carrier in a MFSK demodulator. I have used a moving filter average of length=64 as low pass...

Hi all. I have done a PLL for tracking frecuency carrier in a MFSK demodulator. I have used a moving filter average of length=64 as low pass filter. I cannot rise lenght more than 64 because then PLL would not track frecuency desviations of the transmitter. I dont know if there are other filters better than moving average filter for this application, without surpass 64 coeeficients. Can ...


Digital PLL and FM demodulation

Started by ma in comp.dsp12 years ago 4 replies

Hello, PLL is a good way to do FM demodulation in analogue domain. What about its use in digital domain? Why not to use a digital PLL to do...

Hello, PLL is a good way to do FM demodulation in analogue domain. What about its use in digital domain? Why not to use a digital PLL to do FM demodulation? what is advantages(if any) and disadvantages of this technique? Regards


Question about damping in PLL

Started by fl in comp.dsp7 years ago 5 replies

Hi, I am learning PLL from a web download PLLTutorialISSCC2004.pdf after I read two books on PLL. I do not understand the following...

Hi, I am learning PLL from a web download PLLTutorialISSCC2004.pdf after I read two books on PLL. I do not understand the following statements from the web pdf: ........................... Less ringing and overshoot as Zeta = 1 Severe overdamping --> ringing and overshoot Ringing at high damping due to low oversampling (large R) – Gardner limit. ............. Low damping ---> l


Re: Software PLL (SPLL)

Started by john in comp.dsp13 years ago

Ron N. wrote: > Terry Given wrote: > > Ron N. wrote: > > > Terry Given wrote: > > > > > > > Ron N. wrote: > > > > > > > >...

Ron N. wrote: > Terry Given wrote: > > Ron N. wrote: > > > Terry Given wrote: > > > > > > > Ron N. wrote: > > > > > > > > > Tim Wescott wrote: > > > > > > > > > > > Implementing a PLL in software uses the same basic theory as > > > > > > implementing a PLL in hardware -- you compare your synthesized signal to > > > > > > a reference, generate a phase difference, then servo the frequency of > > > > > > your


implementation of PLL

Started by jkm in comp.dsp14 years ago 1 reply
PLL

Dear Prof.Wolfgang Thank for your reply about PLL and your suggestions are very good and implementation can be possible.Please suggest what you...

Dear Prof.Wolfgang Thank for your reply about PLL and your suggestions are very good and implementation can be possible.Please suggest what you answer " apply MAC operation to voltage using sin-table" jkm


Spectral Shaping using a PLL Loop Filter

Started by Jon Mcleod in comp.dsp11 years ago 5 replies

Sorry to revisit this.. I'm trying (again) to directly generate an 930MHz FSK signal. My "baseband" is a NRZ square wave switching the...

Sorry to revisit this.. I'm trying (again) to directly generate an 930MHz FSK signal. My "baseband" is a NRZ square wave switching the profile pin on a DDS. I'm then multiplying the DSS output with a PLL/VCO to generate a 930MHz carrier. For simplicity, I want to use the PLL loop filter for spectral shaping, to buff out the instantaneous frequency changes and get the final output w...


False phase lock in PLL (GPS application domain)

Started by Anonymous in comp.dsp3 years ago 8 replies
PLL

In GPS L1C/A signal tracking, there is a condition of a false phase lock, w= hich is possible in PLL. This source: http://tinyurl.com/hhc3v8b...

In GPS L1C/A signal tracking, there is a condition of a false phase lock, w= hich is possible in PLL. This source: http://tinyurl.com/hhc3v8b refers to = multiples of 25 Hz being the typical error value. The context, in which the= typical error value is mentioned, is, I assume, the FLL assisted PLL.=20 From another source ("Global Positioning System: Theory and applications Vo= lume I"): "...


I-Q vs PLLs

Started by Anonymous in comp.dsp14 years ago 15 replies

Which gives best performance, a Phase-locked-loop (say all digital - software) or I-Q (ie using arctan and then...

Which gives best performance, a Phase-locked-loop (say all digital - software) or I-Q (ie using arctan and then differentiating) demodulation.Reason I am asking is that a PLL is supposed to be the best - is it better than just the pure number crunching.It woudl appear to me that when you differentiate you introduce noise and the whole point of a PLL is that it a servo which tracks rate of cha...


Re: Software PLL (SPLL)

Started by Terry Given in comp.dsp13 years ago

Ron N. wrote: > Terry Given wrote: > > > Ron N. wrote: > > > > > Tim Wescott wrote: > > > > > > > Implementing a PLL in software uses...

Ron N. wrote: > Terry Given wrote: > > > Ron N. wrote: > > > > > Tim Wescott wrote: > > > > > > > Implementing a PLL in software uses the same basic theory as > > > > implementing a PLL in hardware -- you compare your synthesized signal to > > > > a reference, generate a phase difference, then servo the frequency of > > > > your synthesized signal to your reference. > > ... > > > > Why? Isn't a software PL


Phase ambiguity

Started by cyclotron in comp.dsp10 years ago
PLL

Hi all, We know that a Decision-Feedback PLL (DF-PLL) for MPSK signals has a phase ambiguity of 360/M. How can I go about proving...

Hi all, We know that a Decision-Feedback PLL (DF-PLL) for MPSK signals has a phase ambiguity of 360/M. How can I go about proving that? Thanks for any pointers.


Discrete time PLL - mean time between slips

Started by Nimrod Mesika in comp.dsp16 years ago 1 reply

Hi guys, Can anyone point me to a paper/book describing the analysis of the discrete time PLL? All I could find are books describing the...

Hi guys, Can anyone point me to a paper/book describing the analysis of the discrete time PLL? All I could find are books describing the nonlinear analysis of the continuous time PLL -- an analysis that is based on nonlinear differential equations. A discrete time analysis avoids the difficulty of continuous time white noise, etc. This is all for analysing the mean time between pha...


Re: Software PLL (SPLL)

Started by Noway2 in comp.dsp13 years ago

Thank you both. I think I understand things a bit better than before. I think the idea of using a gross zero crossing aproximator to...

Thank you both. I think I understand things a bit better than before. I think the idea of using a gross zero crossing aproximator to drive the PLL into the neighborhood of the incoming frequency and then letting the loop filter / NCO take over sounds like a very workable idea. Tim, as I indicated, I have been planning this as a future sub project for a while now. I have played around w...


Re: Software PLL (SPLL)

Started by Ron N. in comp.dsp13 years ago

Terry Given wrote: > Ron N. wrote: > > Terry Given wrote: > > > > > Ron N. wrote: > > > > > > > Tim Wescott wrote: > > > > > >...

Terry Given wrote: > Ron N. wrote: > > Terry Given wrote: > > > > > Ron N. wrote: > > > > > > > Tim Wescott wrote: > > > > > > > > > Implementing a PLL in software uses the same basic theory as > > > > > implementing a PLL in hardware -- you compare your synthesized signal to > > > > > a reference, generate a phase difference, then servo the frequency of > > > > > your synthesized signal to your reference. >


PLL and SNR

Started by commsignal in comp.dsp6 years ago 18 replies
PLL

(1) Most of the tutorials discuss the effect of the loop bandwidth and the damping factor on the PLL behaviour. Is there any reference about the...

(1) Most of the tutorials discuss the effect of the loop bandwidth and the damping factor on the PLL behaviour. Is there any reference about the same with respect to the SNR? (2) Any reference deriving the tracking error variance, pull-in range, etc.? Thanks for your help. _____________________________ Posted through www.DSPRelated.com


urgent..c code to implement PLL

Started by hrusikesa patro in comp.dsp15 years ago 1 reply
PLL

hi all, as my project submission date is fast approaching i need c (not c++) code to implement PHASE LOCKED LOOP (PLL) and to plot...

hi all, as my project submission date is fast approaching i need c (not c++) code to implement PHASE LOCKED LOOP (PLL) and to plot output graphs..please take the pains to reply this messege with code or even location where can i get that. thanx Patro


PLL and AFC

Started by Anonymous in comp.dsp9 years ago 19 replies
PLL

PLL is Phase Lock Loop, while AFC is Automatic Frequency Control. Anyone in the group knows what is the difference between these 2 systems,...

PLL is Phase Lock Loop, while AFC is Automatic Frequency Control. Anyone in the group knows what is the difference between these 2 systems, since both are considered as frequency tracking system for transciever? Why in some application we have to choose AFC? THX a lot. Adi


Phase resolution in PLL at audio frequencies

Started by PalapaGuy in comp.dsp10 years ago 17 replies

Hi all. I don't have much background in PLL implementation and would appreciate if someone can refer me to basic info. I need to measure the...

Hi all. I don't have much background in PLL implementation and would appreciate if someone can refer me to basic info. I need to measure the phase of an unmodulated 15 kHz tone down to 0.1 degree if possible. The tone has decent S/N of about 30-40 dB. For acquisition purposes I know its frequency closely within +/- 1 Hz, and I can take up to 10-15 seconds to acquire lock. Could do this in...