Zero flushing in viterbi decoder

Started by san_jack in comp.dsp10 years ago 3 replies

Hi all, In zero termination method of convolution encoder, we pad zeros in the end of each packet. Should we remove the padded zeros in the...

Hi all, In zero termination method of convolution encoder, we pad zeros in the end of each packet. Should we remove the padded zeros in the viterbi decoder.


Trace-back clock in viterbi

Started by san_jack in comp.dsp10 years ago 3 replies

Hi all, I have this doubt in implementation of viterbi decoder in FPGA While the trace-back unit decodes the single bit after tracing...

Hi all, I have this doubt in implementation of viterbi decoder in FPGA While the trace-back unit decodes the single bit after tracing back the path of length 5*L, next input to the viterbi decoder should not be given. But if the input data is continuous, trace-back operation should be completed within single clock input period. So to fulfil the above requirement,i considered a clock...


Viterbi soft-decoding

Started by ssohaib in comp.dsp11 years ago 6 replies

how does Viterbi soft-decoding work? Also suppose rate R=1/2, constraint length is 3, convolutional code(2,1,3). Thank you very much.

how does Viterbi soft-decoding work? Also suppose rate R=1/2, constraint length is 3, convolutional code(2,1,3). Thank you very much.


Complexity of Viterbi decoding algorithm?

Started by PP in comp.dsp14 years ago 3 replies

Hi I was wondering how to express the complexity of the Viterbi algorithm... Is it O(N2) or O(Nlog N) or is it exponential...

Hi I was wondering how to express the complexity of the Viterbi algorithm... Is it O(N2) or O(Nlog N) or is it exponential ? Thanks. Pratap


Channel order and matrix state of viterbi equalization

Started by Fan.Zhang in comp.dsp10 years ago 3 replies

Hi All, I am learning viterbi equalization to deal with ISI caused by multichannel effect. Let us denote L as the channel memory, that means...

Hi All, I am learning viterbi equalization to deal with ISI caused by multichannel effect. Let us denote L as the channel memory, that means we have L+1 channel taps. like this figure below. i.g. L=4 In --D--D--D--D-- | | | | | | | | | | h0 h1 h2 h3 h4 | | | | | | | | | | SIGMA | | Out When we...


Viterbi decoding

Started by israilsaifi in comp.dsp12 years ago 5 replies

Hi all I want to implement viterbi decoding for frequency selective fading channel in matlab could u tell me how i should start writing program ?...

Hi all I want to implement viterbi decoding for frequency selective fading channel in matlab could u tell me how i should start writing program ? thanks Mohd Israil Saifi Researcher AMU Aligarh (india) _____________________________________ Do you know a company who employs DSP engineers? Is it already listed at http://dsprelated.com/employers.php ?


Viterbi Decoder (Complexity when decoding low rate convolutional codes)

Started by johan_mozart in comp.dsp6 years ago 2 replies

Hi, Does the complexity of the viterbi decoder of a 1/N-convolutional code increase with N? The constraint length L is kept constant. Thanks!

Hi, Does the complexity of the viterbi decoder of a 1/N-convolutional code increase with N? The constraint length L is kept constant. Thanks!


Viterbi Synchronization

Started by jeffsimp in comp.dsp12 years ago 4 replies

This is a follow up question to the first posting by another member regarding this issue. I am having the same problem using a Viterbi Decoder. ...

This is a follow up question to the first posting by another member regarding this issue. I am having the same problem using a Viterbi Decoder. I am implementing the design in an FGPA using an IP core that is provided by Altera. One of the proposed solutions referred me to the following link: http://tmo.jpl.nasa.gov/progress_report/42-128/128E.pdf The paper discusses node synchronization a...


Block Viterbi decoding

Started by san_jack in comp.dsp9 years ago 1 reply

Hi all, I need to use block viterbi decoder in my project. What should be the minimum delay required between two blocks of data. Can I input next...

Hi all, I need to use block viterbi decoder in my project. What should be the minimum delay required between two blocks of data. Can I input next few blocks of data while the present block is being decoded. I tend to use xilinx/lattice IP core.


Viterbi decoding of Repetition codes. Is it possible?

Started by Communications_engineer in comp.dsp10 years ago 9 replies

Hello, now my question is that can we do viterbi decoding of a repetition code; for eg, I have an input '1' so I repeat it 20 times (I know this...

Hello, now my question is that can we do viterbi decoding of a repetition code; for eg, I have an input '1' so I repeat it 20 times (I know this not good as an error correction code and also as far as efficient use of channel capacity is concerned, but I want to know this for knowledge) and vice versa for '0' So for a sequence 1 0 1 1 0 moving right to left (in order) I get 1111111111...


Viterbi Decoder

Started by fsm12 in comp.dsp9 years ago 8 replies

I want to know that for a particular viterbi decoder e.g for 1/2,7 type ,with traceback depth of 48, if input data frame contains 2000 bits...

I want to know that for a particular viterbi decoder e.g for 1/2,7 type ,with traceback depth of 48, if input data frame contains 2000 bits ,IS it possible to correct only upto 4 errors in this data stream and is there any relation between error correcting capability and location of these errors in the data pattern?


hardware Viterbi

Started by lanbaba in comp.dsp13 years ago 2 replies

Hi all, I implemented an OFDM receiver in C++ and it turs out that some parts are bottle necks for the speed, like e.g. Viterbi decoding and...

Hi all, I implemented an OFDM receiver in C++ and it turs out that some parts are bottle necks for the speed, like e.g. Viterbi decoding and RS decoding. Does anyone know if there is a hardware based decoding solution on the market? Ideally it would be a PCI card for PC and configurable for different codes by software. Don't tell me about general purpose DSPs or FPGA. It takes too long for me...


Viterbi Decoder: Bit Rate > Clock Rate

Started by Phil in comp.dsp13 years ago 3 replies

Hi, I'm looking for any good references for viterbi implementations that allow for a data rate higher than the clock rate. As I understand...

Hi, I'm looking for any good references for viterbi implementations that allow for a data rate higher than the clock rate. As I understand it, this implies using butterflies in the trellis of higher than radix 2. Any help is much appreciated. Phil


Sliding Block Viterbi Decoder

Started by amlmadrid in comp.dsp10 years ago 2 replies

Hi all, does anyone know how can I do the viterbi decoding of a very large bit stream by spliting it up in blocks? So, the output of the...

Hi all, does anyone know how can I do the viterbi decoding of a very large bit stream by spliting it up in blocks? So, the output of the decoded stream of each block should be concatenated to the output of the next block. I have seen that it is a very common problem but none says how to solve it. The thing is that if I try to decode a very big string of bits, the metrics overflow. By the way, i...


Viterbi Soft Decision

Started by JAlbertoDJ in comp.dsp12 years ago 8 replies

I have implemented a Viterbi soft decision (1/2 k=7) for a BFSK modulation. I need to know the minimum level deeper into the trellis to get...

I have implemented a Viterbi soft decision (1/2 k=7) for a BFSK modulation. I need to know the minimum level deeper into the trellis to get symbol. In a book, i read something about a good value is 4 or 5 times the constraint lenght. Now, for example, after 32 levels (or states) i get the first symbol, but then o have a delay of 32 bits. Can i get a good measure of metric after 8 o...


Systolic Viterbi Decoder ?

Started by BERT in comp.dsp12 years ago

Hi, Sorry for the cross-post, but I think this is a relevant topic in both newsgroups. Has anyone come across this paper ? T.K. Troung,...

Hi, Sorry for the cross-post, but I think this is a relevant topic in both newsgroups. Has anyone come across this paper ? T.K. Troung, Ming-Tang Shih, I.S. Reed, E.H. Satorius, "A VLSI design for a trace-back viterbi decoder", IEEE Tranactions on Communications, Vol. 40, No. 3, March 1992. They describe a register-based systolic approach to implement the traceback that they claim ...


Locating Frame Boundaries when De - Puncturing (Viterbi Decoder)

Started by rjbrennn in comp.dsp11 years ago

Hello, I am trying to add the ability to de-puncture to my viterbi decoder, but I am unsure of how to determine where to insert my "don't care"...

Hello, I am trying to add the ability to de-puncture to my viterbi decoder, but I am unsure of how to determine where to insert my "don't care" bits. If I have received a stream of bits that are encoded, how is it possible to find the proper location to place the bits that were punctured out at the encoder? I have thought of using an initial block of data and testing different offsets, usin...


BER after Viterbi or RS decoding

Started by lanbaba in comp.dsp13 years ago 10 replies

Hi all, Does any one know a way to measure the BER after Viterbi or RS decoding at the Rx side if the uncoded data at the Tx side is unknown?

Hi all, Does any one know a way to measure the BER after Viterbi or RS decoding at the Rx side if the uncoded data at the Tx side is unknown?


Viterbi Decoder Codes

Started by poorva in comp.dsp12 years ago 1 reply

Hi ! I am looking for Viterbi decoder codes in C and fixed point. Please point me to the source code for the same. Thanks &...

Hi ! I am looking for Viterbi decoder codes in C and fixed point. Please point me to the source code for the same. Thanks & Regards, Poorva


qpsk and viterbi decoding

Started by Ted in comp.dsp15 years ago 8 replies

QPSK has four constellation points representing a the following data bits (00, 01, 10 and 11). If this was transmitted using, say 1/3 rate...

QPSK has four constellation points representing a the following data bits (00, 01, 10 and 11). If this was transmitted using, say 1/3 rate convolutional encoder, and soft decision viterbi decoding was applied at the receiver, then of the 3 bits received, 2 of the 3 bits can be used to decode a QPSK symbol. from which the euclidean distance can be calculated. This now leaves one bit remaini...