Trace-back clock in viterbi

Started by san_jack in comp.dsp11 years ago 3 replies

Hi all, I have this doubt in implementation of viterbi decoder in FPGA While the trace-back unit decodes the single bit after tracing...

Hi all, I have this doubt in implementation of viterbi decoder in FPGA While the trace-back unit decodes the single bit after tracing back the path of length 5*L, next input to the viterbi decoder should not be given. But if the input data is continuous, trace-back operation should be completed within single clock input period. So to fulfil the above requirement,i considered a clock...


Zero flushing in viterbi decoder

Started by san_jack in comp.dsp11 years ago 3 replies

Hi all, In zero termination method of convolution encoder, we pad zeros in the end of each packet. Should we remove the padded zeros in the...

Hi all, In zero termination method of convolution encoder, we pad zeros in the end of each packet. Should we remove the padded zeros in the viterbi decoder.


Viterbi soft-decoding

Started by ssohaib in comp.dsp12 years ago 6 replies

how does Viterbi soft-decoding work? Also suppose rate R=1/2, constraint length is 3, convolutional code(2,1,3). Thank you very much.

how does Viterbi soft-decoding work? Also suppose rate R=1/2, constraint length is 3, convolutional code(2,1,3). Thank you very much.


Complexity of Viterbi decoding algorithm?

Started by PP in comp.dsp15 years ago 3 replies

Hi I was wondering how to express the complexity of the Viterbi algorithm... Is it O(N2) or O(Nlog N) or is it exponential...

Hi I was wondering how to express the complexity of the Viterbi algorithm... Is it O(N2) or O(Nlog N) or is it exponential ? Thanks. Pratap


Viterbi decoding

Started by israilsaifi in comp.dsp13 years ago 5 replies

Hi all I want to implement viterbi decoding for frequency selective fading channel in matlab could u tell me how i should start writing program ?...

Hi all I want to implement viterbi decoding for frequency selective fading channel in matlab could u tell me how i should start writing program ? thanks Mohd Israil Saifi Researcher AMU Aligarh (india) _____________________________________ Do you know a company who employs DSP engineers? Is it already listed at http://dsprelated.com/employers.php ?


Viterbi Synchronization

Started by jeffsimp in comp.dsp12 years ago 4 replies

This is a follow up question to the first posting by another member regarding this issue. I am having the same problem using a Viterbi Decoder. ...

This is a follow up question to the first posting by another member regarding this issue. I am having the same problem using a Viterbi Decoder. I am implementing the design in an FGPA using an IP core that is provided by Altera. One of the proposed solutions referred me to the following link: http://tmo.jpl.nasa.gov/progress_report/42-128/128E.pdf The paper discusses node synchronization a...


Channel order and matrix state of viterbi equalization

Started by Fan.Zhang in comp.dsp11 years ago 3 replies

Hi All, I am learning viterbi equalization to deal with ISI caused by multichannel effect. Let us denote L as the channel memory, that means...

Hi All, I am learning viterbi equalization to deal with ISI caused by multichannel effect. Let us denote L as the channel memory, that means we have L+1 channel taps. like this figure below. i.g. L=4 In --D--D--D--D-- | | | | | | | | | | h0 h1 h2 h3 h4 | | | | | | | | | | SIGMA | | Out When we...


Viterbi Decoder (Complexity when decoding low rate convolutional codes)

Started by johan_mozart in comp.dsp7 years ago 2 replies

Hi, Does the complexity of the viterbi decoder of a 1/N-convolutional code increase with N? The constraint length L is kept constant. Thanks!

Hi, Does the complexity of the viterbi decoder of a 1/N-convolutional code increase with N? The constraint length L is kept constant. Thanks!


BER after Viterbi or RS decoding

Started by lanbaba in comp.dsp14 years ago 10 replies

Hi all, Does any one know a way to measure the BER after Viterbi or RS decoding at the Rx side if the uncoded data at the Tx side is unknown?

Hi all, Does any one know a way to measure the BER after Viterbi or RS decoding at the Rx side if the uncoded data at the Tx side is unknown?


BFSK with Viterbi vs 16FSK with Viterbi

Started by JAlbertoDJ in comp.dsp13 years ago 3 replies

** BER for a FSK noncoherent is PE=(M-1)/2 * exp(-Es/2No) => PE= (16-1)/2 * exp(-Es/2No) BER= PE*(M/2)/(M-1)=> BER= PE*8/15 BER=...

** BER for a FSK noncoherent is PE=(M-1)/2 * exp(-Es/2No) => PE= (16-1)/2 * exp(-Es/2No) BER= PE*(M/2)/(M-1)=> BER= PE*8/15 BER= 4 * exp(-Es/2No) ** BER for a BFSK noncoherent is BER= 1/2 * exp(-Es/2No) So, BER for 16FSK is 8 times BER for BFSK. But, after Viterbi in both cases, will be the different between both modulations 8 times?


cdma2000 viterbi decoder using TMSC67 DSP (fixed point)

Started by Oompah Loompah in comp.dsp10 years ago

Hi Does anyone know where I can find the code for implementing the subject decoder? Ideally, I am looking for a TI application note or some...

Hi Does anyone know where I can find the code for implementing the subject decoder? Ideally, I am looking for a TI application note or some similar document. I searched the TI website but couldn't find a lot there. Note that my DSP would not have a viterbi coprocessor(VCP) so the implementations utilising VCP will not be useful for me. Thanks


hardware Viterbi

Started by lanbaba in comp.dsp14 years ago 2 replies

Hi all, I implemented an OFDM receiver in C++ and it turs out that some parts are bottle necks for the speed, like e.g. Viterbi decoding and...

Hi all, I implemented an OFDM receiver in C++ and it turs out that some parts are bottle necks for the speed, like e.g. Viterbi decoding and RS decoding. Does anyone know if there is a hardware based decoding solution on the market? Ideally it would be a PCI card for PC and configurable for different codes by software. Don't tell me about general purpose DSPs or FPGA. It takes too long for me...


Block Viterbi decoding

Started by san_jack in comp.dsp10 years ago 1 reply

Hi all, I need to use block viterbi decoder in my project. What should be the minimum delay required between two blocks of data. Can I input next...

Hi all, I need to use block viterbi decoder in my project. What should be the minimum delay required between two blocks of data. Can I input next few blocks of data while the present block is being decoded. I tend to use xilinx/lattice IP core.


Viterbi decoding of Repetition codes. Is it possible?

Started by Communications_engineer in comp.dsp11 years ago 9 replies

Hello, now my question is that can we do viterbi decoding of a repetition code; for eg, I have an input '1' so I repeat it 20 times (I know this...

Hello, now my question is that can we do viterbi decoding of a repetition code; for eg, I have an input '1' so I repeat it 20 times (I know this not good as an error correction code and also as far as efficient use of channel capacity is concerned, but I want to know this for knowledge) and vice versa for '0' So for a sequence 1 0 1 1 0 moving right to left (in order) I get 1111111111...


Viterbi Decoder

Started by fsm12 in comp.dsp10 years ago 8 replies

I want to know that for a particular viterbi decoder e.g for 1/2,7 type ,with traceback depth of 48, if input data frame contains 2000 bits...

I want to know that for a particular viterbi decoder e.g for 1/2,7 type ,with traceback depth of 48, if input data frame contains 2000 bits ,IS it possible to correct only upto 4 errors in this data stream and is there any relation between error correcting capability and location of these errors in the data pattern?


Sliding Block Viterbi Decoder

Started by amlmadrid in comp.dsp10 years ago 2 replies

Hi all, does anyone know how can I do the viterbi decoding of a very large bit stream by spliting it up in blocks? So, the output of the...

Hi all, does anyone know how can I do the viterbi decoding of a very large bit stream by spliting it up in blocks? So, the output of the decoded stream of each block should be concatenated to the output of the next block. I have seen that it is a very common problem but none says how to solve it. The thing is that if I try to decode a very big string of bits, the metrics overflow. By the way, i...


Viterbi Decoder: Bit Rate > Clock Rate

Started by Phil in comp.dsp14 years ago 3 replies

Hi, I'm looking for any good references for viterbi implementations that allow for a data rate higher than the clock rate. As I understand...

Hi, I'm looking for any good references for viterbi implementations that allow for a data rate higher than the clock rate. As I understand it, this implies using butterflies in the trellis of higher than radix 2. Any help is much appreciated. Phil


16-PAM Demodulation and Viterbi

Started by m2francis in comp.dsp14 years ago 1 reply

Hi, If I have a 16-QAM demodulator I know I can use the I and Q values to access a lookup table and output soft codes for a Viterbi uisng...

Hi, If I have a 16-QAM demodulator I know I can use the I and Q values to access a lookup table and output soft codes for a Viterbi uisng LLR What do I do if I'm using 16-PAM? If my information is right its just amplitude modulation. So out of the demodulator I will get 1 of 16 values. How do I then create the soft codes indicating how strong, or weak the '1's and '0's are? Thanks Mike ...


speaker verification with HMM

Started by Ellyn in comp.dsp13 years ago

Hi. I am trying to write a program to verify the speaker. I'm confusing with the viterbi algorithm in Hidden Markov Model(HMM). As I know,...

Hi. I am trying to write a program to verify the speaker. I'm confusing with the viterbi algorithm in Hidden Markov Model(HMM). As I know, the viterbi algorithm is used to find the best path of the sequence. I would like to know how this algorithm can help when I want to verify whether the speaker is imposter or not. [the log likelihood computed is too small. It is around -300 for the...


Viterbi 'synchronization'?

Started by jookie in comp.dsp12 years ago 9 replies

Hello, this is almost a philosofical questions, but I couldn't find an answer on the web, so I'm asking here. I am trying to decode a...

Hello, this is almost a philosofical questions, but I couldn't find an answer on the web, so I'm asking here. I am trying to decode a stream of convolutionary coded symbols (R=1/2; K=7) with Viterbi and everything runs fine. The encoded makes from one bit two symbols, so the encoded stream contains these alternating symbols (1st, 2nd, 1st, 2nd, 1st, 2nd, etc.). When I pass the stream t...