Any timing problem of using LCX16245 to drive the Data and address pins of 56805 ??

Started by Gonggh in Freescale DSPs17 years ago 7 replies

Hi all. When building my own 56805 board, I would add two LCX16245 to drive the 56805's address and data signals, will these cause...

Hi all. When building my own 56805 board, I would add two LCX16245 to drive the 56805's address and data signals, will these cause any problem to the external bus timing. LCX16245 has a delay time from 1.5ns to 4.5ns, can 56805 sustain this delay? Or, is it necessary to add the


PRAM segment. What is it ?

Started by Anonymous in Freescale DSPs17 years ago 3 replies

Is about from two years that I'm using 56805 microcontroller and I don't know yet what PRAM segment is. Can anyone explan me ? ...

Is about from two years that I'm using 56805 microcontroller and I don't know yet what PRAM segment is. Can anyone explan me ? Thanks


Program xFlash & interrupt problem

Started by Anonymous in Freescale DSPs17 years ago 2 replies

Does anyone know if is necessary to disable all interrupt ISR when programming or erasing xFlash data ? I'm using 56805...

Does anyone know if is necessary to disable all interrupt ISR when programming or erasing xFlash data ? I'm using 56805 microcontroller in single chip mode. Thanks Giuliano


Looking for a DSP56F805 EVM for senior design project

Started by dperlm22 in Freescale DSPs16 years ago

I am an EE student and I'm trying to get ahold of an evaluation board for the 56805 DSP processor to use for my senior design...

I am an EE student and I'm trying to get ahold of an evaluation board for the 56805 DSP processor to use for my senior design project. The motorola website lists the price at almost $300 which I frankly can't afford. Please contact me directly if you are willing to lend it to me for


SCI with two stop bits, is possible ?

Started by Anonymous in Freescale DSPs17 years ago 1 reply

I'm using 56805, and I'm trying to set the SCI with two stop bits. As mentioned in table 12.2 of family manual it seems possible but...

I'm using 56805, and I'm trying to set the SCI with two stop bits. As mentioned in table 12.2 of family manual it seems possible but is doesn't work! Does anyone have experience with this SCI set ? Thanks Giuliano


bit-wise shift operator problem

Started by mark...@bish.net in Freescale DSPs14 years ago 2 replies

56805 DSP and I am trying to shift 16 places to the left into an unsigned long (32-bit size). unsigned long big_value = 0; ...

56805 DSP and I am trying to shift 16 places to the left into an unsigned long (32-bit size). unsigned long big_value = 0; big_value = 1 << 16; big_value is still zero. What am I missing?


question about compare registers

Started by in Freescale DSPs15 years ago

hi, everybody I have a question about compare registers. The dsp 56805 has two compare registers. How to use these two registers...

hi, everybody I have a question about compare registers. The dsp 56805 has two compare registers. How to use these two registers at same time? The dual Compare registers (CMP1 & CMP2) provide a bi-directional modulo count capability is introduced in the DSP56F805's guide. H


Normal, Fast and Super Fast interrupt on 56805

Started by Bruno Tremblay in Freescale DSPs16 years ago

Hi, I want to speed up the response of my interrupt on the input 1 of timerA and after reading the Embedded SDK...

Hi, I want to speed up the response of my interrupt on the input 1 of timerA and after reading the Embedded SDK Programmer's Guide I'm still confuse on how can I specify this interrupt as Fast or Super Fast. I know with a Super Fast ISR I must manage the context


Boot sector size in 56805

Started by Anonymous in Freescale DSPs17 years ago 1 reply

Actualy the boot sector is 2Kword size. If my boot loader program is more than 2Kword, can I use normal PFlash ? This obviusly...

Actualy the boot sector is 2Kword size. If my boot loader program is more than 2Kword, can I use normal PFlash ? This obviusly reduce the application size, but Is boot sector different from normal PFlash sectors ? Thanks Giuliano


Writing MSCAN CANE bit (56805)

Started by Jan Zizka in Freescale DSPs16 years ago 1 reply

Hi, in manual there is written following about CANTCL1 register bits (ch. 8.8.2 of 5680x User's manual): "These bits are...

Hi, in manual there is written following about CANTCL1 register bits (ch. 8.8.2 of 5680x User's manual): "These bits are read/write at any time when SFTRES = 1, except CANE. It is write once in normal modes and any time in special modes when SFTRES = 1."