GPIO interrupts: still no fun

Started by drmapl in Freescale DSPs17 years ago 1 reply

Hi code wizards (or warriors), I still haven't got my GPIO interrupt sorted using the 56F805EVM board and CW. I use the code below...

Hi code wizards (or warriors), I still haven't got my GPIO interrupt sorted using the 56F805EVM board and CW. I use the code below but I must miss something as it is not doing what I expect. I expect it to end up in the routine dirISR but it never gets there. I have tried using the s


Disabling EOnCE

Started by Hardeep in Freescale DSPs14 years ago 1 reply

Hi, I am using the DSP56858. Is there a way to turn off the EOnCE module once the board has been programmed? The reason I am asking this is...

Hi, I am using the DSP56858. Is there a way to turn off the EOnCE module once the board has been programmed? The reason I am asking this is to determine whether and/or how much current is being consumed with it on. I have created a project in which I put the DSP into Wait mode (wait for interrupt) with no interrupts enabled (other than the core interrupts that may occur) so that I can...


ADC does not start

Started by alberto_reit in Freescale DSPs16 years ago

Hallo to all, I'm using a 58F4046, it has 2 adc converter module ADCA and ADCB. I've tried ADCA in simultaneous scan mode and it...

Hallo to all, I'm using a 58F4046, it has 2 adc converter module ADCA and ADCB. I've tried ADCA in simultaneous scan mode and it works fine and generates the " on end" interrupt. I want to do the same with ADB but it doesen't work. I can see it by placing a breakpoint in th


RE: RE: #pragma interrupt / modulus (%) affects int errupts?

Started by Wim de Haan in Freescale DSPs16 years ago

Hi William, I think, there is a slip of your keyboard. It must be: In the DSP56800 family: JSR pushes PC & SR on the...

Hi William, I think, there is a slip of your keyboard. It must be: In the DSP56800 family: JSR pushes PC & SR on the stack. RTS pops SR & PC from the stack, restores PC but discards SR from stack (so SR remains unchanged). RTI pops SR & PC from t


DSP56858EVM Codec

Started by Kenneth Ciszewski in Freescale DSPs17 years ago

OK. I have the codec running both at the independent and dependent level on a DSP56858EVM. I am really looking to strip this driver ...

OK. I have the codec running both at the independent and dependent level on a DSP56858EVM. I am really looking to strip this driver down to a two sample depth (one left channel and one right channel) per interrupt frame. I'm not sure about how to do this. Any suggestions?


Stack Extension..

Started by Steve Kellogg in Freescale DSPs16 years ago 2 replies

Hello, I'm using a 56321, and I think I need to enable Stack extension (I'm getting unpredictable behavior in an interrupt that...

Hello, I'm using a 56321, and I think I need to enable Stack extension (I'm getting unpredictable behavior in an interrupt that can be 'fixed' by reducing the nesting level of DOR loops). I've looked all over for a simple example of how to correctly enable


563xx SCI port

Started by wygonski in Freescale DSPs17 years ago

I need to transmit a block of 24-bit words via interrupt-driven SCI of 563xx. User manual says that I can efficiently unpack and...

I need to transmit a block of 24-bit words via interrupt-driven SCI of 563xx. User manual says that I can efficiently unpack and transfer the 3-bytes comprising the word to the SCI Transmit Register (STX) by writing to STXL, STXM, and STXH. What I'd like to do in my ISR is to


Re STOP mode

Started by Graeme Fisher in Freescale DSPs16 years ago 1 reply

Hi All I would like to know whether the DSP56311 respondes to interrupts while in the STOP state. I know that IRQA will...

Hi All I would like to know whether the DSP56311 respondes to interrupts while in the STOP state. I know that IRQA will cause it to exit the STOP mode. However, What happens if IRQB is asserted while in the stop mode. Will there be a pending interrupt when the ST


56f807 + SDK + ucos

Started by max_mont in Freescale DSPs17 years ago

Hi, I'm developing an application on the 56f807 with SDK and ucos II. The application is running very well. But when it runs...

Hi, I'm developing an application on the 56f807 with SDK and ucos II. The application is running very well. But when it runs during a long time, all the interrupts are disabled, including the OS timer (D0), excluding the PWM reload interrupt. This problem appears,


56f80x interrupt/pipeline problem?

Started by bergy50us in Freescale DSPs16 years ago

I'm running a round robin multitasker on a 56F801. Interrupts are heavily used, but not for task switching. When I go to change...

I'm running a round robin multitasker on a 56F801. Interrupts are heavily used, but not for task switching. When I go to change the stack pointer (SP) I find that I must lock out interrupts around the following: move x:(r3),sp nop move x:(sp)-,r1 move


Interrupt GPIO

Started by Maria in Freescale DSPs16 years ago

Hi all! I do not understand. My code {.......... /*Initialize PORT B*/ hard.PortB = gpioOpen (BSP_DEVICE_NAME_GPIO_B, NULL);...

Hi all! I do not understand. My code {.......... /*Initialize PORT B*/ hard.PortB = gpioOpen (BSP_DEVICE_NAME_GPIO_B, NULL); periphMemWrite(0,PORTB_BASE+PORT_DDR); periphMemWrite(0,PORTB_BASE+PORT_PER); periphMemWrite(255,PORTB_BASE+PORT_IENR); periphMem


RE: MORE: '826 - when interrupts are active - Softw are is loosing it....

Started by Corey, Rick in Freescale DSPs17 years ago 1 reply

Hi Boaz What version of CodeWarrior are you using? I think it was version 5.0.2 or 5.0.3 that had problems with pragma...

Hi Boaz What version of CodeWarrior are you using? I think it was version 5.0.2 or 5.0.3 that had problems with pragma interrupt, at least if you checked "deferred inlining" under Language Settings under Target settings. The absence of an RTI at the end of an ISR wou


56803 PWM duty cycle sweep speed

Started by Corey, Rick in Freescale DSPs16 years ago 4 replies

Hi We are presently trying to use the DSP56F803 PWM (channel 4) as a simple independent PWM output. We are sweeping the output...

Hi We are presently trying to use the DSP56F803 PWM (channel 4) as a simple independent PWM output. We are sweeping the output duty cycle from 0% to 100% and therefore, updating and reloading the PWM timer on every timeout interrupt of the PWM. When we then observ


Rif: RE: Program xFlash & interrupt problem

Started by Anonymous in Freescale DSPs18 years ago

Very interest discussion. Fortunately for this application I can disable all interrupts during flash erase&write (disabled for...

Very interest discussion. Fortunately for this application I can disable all interrupts during flash erase&write (disabled for 40msec!!!!! during page erase) . But I want see your code because the problem is hot. Could send me your applicaton file another time in ZIP format ? Th


AW: PCMaster Baud rate

Started by Bende Georg in Freescale DSPs16 years ago

The maximum speed I was able to use PCMaster was 38400, but in this case the routine was called every 300 microseconds....

The maximum speed I was able to use PCMaster was 38400, but in this case the routine was called every 300 microseconds. Alternatively you can make it interrupt-driven but don't expect too much speed increase because it's pretty tough to process commands and assemble the packets on that spe


Interrupt undefined in flash memory.

Started by schmighty80222 in Freescale DSPs18 years ago 2 replies

Hi there, My interrupts work in ExRam mode but are undefined in Flash mode. Any suggestions? schmighty ...

Hi there, My interrupts work in ExRam mode but are undefined in Flash mode. Any suggestions? schmighty


A/d sdk driver for 56f807 question

Started by Roelof Oelofsen in Freescale DSPs18 years ago 1 reply

Hi group, I just started to explore the A/D SDK driver for the 56f807. My question is this: If I set the A/D up in loop...

Hi group, I just started to explore the A/D SDK driver for the 56f807. My question is this: If I set the A/D up in loop sequential mode, the conversion complete interrupt will be disabled. In the header file the auther states that I must use the ADC_STATE_READ ADC ioctl


RE: simple project demonstrating how to set-up inte rrupts without the use of SDK

Started by Jarrid Gross in Freescale DSPs18 years ago

I agree with Art here. Daniel sent me (last year) a proto-type project using the simple intrinsic methods for dealing with an...

I agree with Art here. Daniel sent me (last year) a proto-type project using the simple intrinsic methods for dealing with an interrupt. This is what I used for some time, without any significant problem. I had setup direct (NON SDK) vectors and handlers for 4 timers, async TX


I can't enter 805's input capture interupt

Started by xiong2046296 in Freescale DSPs15 years ago

Hi,everyone: I use 05EVM and Metrowerks SDK2.4, also i use the embedded RTOS uc-osII2.51 to develop . Now i have four tasks and three...

Hi,everyone: I use 05EVM and Metrowerks SDK2.4, also i use the embedded RTOS uc-osII2.51 to develop . Now i have four tasks and three interrupts. They are two quadTimer tasks----timerB_0 and TimerB_1, which TimerB_0 have two interrupts--- callbackOnCompare and callbanckOnInputedge .The third interrupt is Pwm_A_reloadcallback. Now i can't enter the


AW: help.......we are beginer

Started by Bende Georg in Freescale DSPs15 years ago

AFAIK the only way ist to check it in the interrupt routine with reading the GPIO data register. Georg Bende > -----Urspr?ngliche...

AFAIK the only way ist to check it in the interrupt routine with reading the GPIO data register. Georg Bende > -----Urspr?ngliche Nachricht----- > Von: motoroladsp@moto... > [mailto:motoroladsp@moto...] Im Auftrag von rficoca2 > Gesendet: Montag, 25. April 2005 22:24 > An: motoroladsp@moto... > Betreff: [motoroladsp] h