Writing MSCAN CANE bit (56805)

Started by Jan Zizka in Freescale DSPs16 years ago 1 reply

Hi, in manual there is written following about CANTCL1 register bits (ch. 8.8.2 of 5680x User's manual): "These bits are...

Hi, in manual there is written following about CANTCL1 register bits (ch. 8.8.2 of 5680x User's manual): "These bits are read/write at any time when SFTRES = 1, except CANE. It is write once in normal modes and any time in special modes when SFTRES = 1."


Question regarding interrupts in DSP56F805

Started by Chandrasekar Ramkumar in Freescale DSPs14 years ago 2 replies

Hi Rick, I read thru the AN2283 document, which explains the interrupt structure in 805. In my program i have used the Transmit buffer 0 to...

Hi Rick, I read thru the AN2283 document, which explains the interrupt structure in 805. In my program i have used the Transmit buffer 0 to store the message. I initially stored the message in Transmit buffer 0 and clear the TXE0 flag by writing 1 to it. I also set TXEIE0 to give a transmit interrupt. But after this the MSCAN does not set the TXE0 flag to transmit the messag


MSCAN TxErr counter latches before BusOff when CANH shorted to Battery

Started by Stahlman Brett in Freescale DSPs14 years ago 1 reply

  Hello all,   I don't know whether this is a problem or not. During testing of our prod

  Hello all,   I don't know whether this is a problem or not. During testing of our prod