Hi Rick- > Do you know this for a fact, have you tried it? I once researched it and > could find no one who had actually tried it first hand. A few told me that > you could do it if you had the information to put the extra chips in bypass > mode. But some told me to put the TI part first and others told me to put > it last. TI has app notes saying that it is supported, but no one at the > hotline could tell me anything about it. I tried it in 2002, did not work, have not tried it since. Any "problem" encountered is likely not really anything significant technically, it's tech support/political. Once you mention to TI person, or vice versa Xilinx person, that you've got the other guys' device on the chain, they immediately say "you'll have to separate that or we cannot help you". Also every month so we encounter a new PC that has some issues with CCS + JTAG. We always get these fixed, but it does take time. How to separate that from something on the board? One way is to keep the board simple. I have no interest to fix interesting JTAG bugs for TI/Xilinx FAEs (who are normally super helpful BTW). I just want to get done and move on. -Jeff Arius - Rick Collins wrote: > > At 01:57 PM 10/7/2004, you wrote: > > >Morteza- > > > > > > Dear Amin, JTAG is a standard port and has a standard protocol that > > > > each vendor use it for programming their chips and hardware. TI gives > > > > you a capability with its Code Composer Studio to program your TI's > > > > DSP chips directly from its environment. I've never use my FPGA JTAG > > > > for programming my DSPs, but I'm sure about it that all of them use a > > > > standard protocols. I think the problem of using the other JTAGs is > > > > the knowledge that TI integrate with its JTAG driver. I don't know > > > > exactly the price of its JTAG emulator, but I remember that it's > > > > about 5000$ (4 to 5 million toman, It's a little expensive students > > > > usage). > > > > > > I wouldn't try plugging my FPGA JTAG into a TI DSP though. I don't think > > > all JTAG is created equal, although I am not familiar with the low-level > > > specs. AFAIK there is a basic protocol that each manufacturer extends to > > > add other features. Originally JTAG was meant to be used as a boundry > > > scan for automated testing, wasn't it? > > > > > > I can buy a $15 JTAG adapter for MSP430 development, but I dont' think > > > it will work with the TI DSP's. > > > > > > It would have been nice if you could daisy chain JTAG devices together > > > and use one JTAG pod (ie. MSP430 and TI DSP on the same JTAG bus) for > > > debugging. > > > >Brian is correct. You're asking for trouble if you put Xilinx or Altera > >on your DSP > >JTAG chain. CCS + JTAG is tricky enough without adding extra difficulties. > > > >For applications where a single header is needed (space constraint), or > >in-circuit-test/boundary scan (production situation), we use bus switches > >to separate > >JTAG chains. > > Jeff, > > Do you know this for a fact, have you tried it? I once researched it and > could find no one who had actually tried it first hand. A few told me that > you could do it if you had the information to put the extra chips in bypass > mode. But some told me to put the TI part first and others told me to put > it last. TI has app notes saying that it is supported, but no one at the > hotline could tell me anything about it. > > Rick Collins > > Arius - A Signal Processing Solutions Company > Specializing in DSP and FPGA design http://www.arius.com > 4 King Ave 301-682-7772 Voice > Frederick, MD 21701-3110 301-682-7666 FAX |