>On Jan 7, 9:01=A0am, cincy...@gmail.com wrote:
>> On Jan 7, 5:46=A0am, "Fan.Zhang" <zf...@sina.com> wrote:
>>
>>
>>
>> > Hi All,
>>
>> > I am learning viterbi equalization to deal with ISI caused by
multichan=
>nel
>> > effect.
>>
>> > Let us denote L as the channel memory, that means we have L+1
channel
>> > taps. like this figure below. i.g. =A0L=3D4
>>
>> > =A0In DDDD
>> > =A0 =A0 =A0 =A0 =A0 =A0 =A0
>> > =A0 =A0 =A0 =A0 =A0 =A0 =A0
>> > =A0 =A0 =A0h0 h1 h2 h3 h4
>> > =A0 =A0 =A0 =A0 =A0 =A0 =A0
>> > =A0 =A0 =A0 =A0 =A0 =A0 =A0
>> > =A0 =A0 =A0 =A0 =A0SIGMA
>> > =A0 =A0 =A0 =A0 =A0 =A0
>> > =A0 =A0 =A0 =A0 =A0 =A0
>> > =A0 =A0 =A0 =A0 =A0 =A0Out
>>
>> > When we do viterbi algorithm, how many bits we need for each state
in
>> > trellis? 4 or 5? And why? I prefer 5, but I am not sure.
>>
>> > 0000 0001 0010 1111? =A0or 00000 00001 11111?
>>
>> > Thanks,
>>
>> > Frankie
>>
>> You must have enough Viterbi states to represent all of the possible
>> values for the channel's memory. So, if your channel model uses the
>> current bit as well as the last 4 bits, then you need 2^4 =3D 16
states.
>>
>> Jason
>
>Yes. It sounds like the OP includes the current input as part of the
>memory, but that is incorrect. The current input dictates which
>transition out of the prior state is taken when the input arrives.
>
>John
>
Hi Jason and John,
Thanks for your help. I am clear now.
Frankie
Reply by John●January 7, 200920090107
On Jan 7, 9:01�am, cincy...@gmail.com wrote:
> On Jan 7, 5:46�am, "Fan.Zhang" <zf...@sina.com> wrote:
>
>
>
> > Hi All,
>
> > I am learning viterbi equalization to deal with ISI caused by multichannel
> > effect.
>
> > Let us denote L as the channel memory, that means we have L+1 channel
> > taps. like this figure below. i.g. �L=4
>
> > �In DDDD
> > � � � � � � �
> > � � � � � � �
> > � � �h0 h1 h2 h3 h4
> > � � � � � � �
> > � � � � � � �
> > � � � � �SIGMA
> > � � � � � �
> > � � � � � �
> > � � � � � �Out
>
> > When we do viterbi algorithm, how many bits we need for each state in
> > trellis? 4 or 5? And why? I prefer 5, but I am not sure.
>
> > 0000 0001 0010 1111? �or 00000 00001 11111?
>
> > Thanks,
>
> > Frankie
>
> You must have enough Viterbi states to represent all of the possible
> values for the channel's memory. So, if your channel model uses the
> current bit as well as the last 4 bits, then you need 2^4 = 16 states.
>
> Jason
Yes. It sounds like the OP includes the current input as part of the
memory, but that is incorrect. The current input dictates which
transition out of the prior state is taken when the input arrives.
John
Reply by ●January 7, 200920090107
On Jan 7, 5:46�am, "Fan.Zhang" <zf...@sina.com> wrote:
> Hi All,
>
> I am learning viterbi equalization to deal with ISI caused by multichannel
> effect.
>
> Let us denote L as the channel memory, that means we have L+1 channel
> taps. like this figure below. i.g. �L=4
>
> �In DDDD
> � � � � � � �
> � � � � � � �
> � � �h0 h1 h2 h3 h4
> � � � � � � �
> � � � � � � �
> � � � � �SIGMA
> � � � � � �
> � � � � � �
> � � � � � �Out
>
> When we do viterbi algorithm, how many bits we need for each state in
> trellis? 4 or 5? And why? I prefer 5, but I am not sure.
>
> 0000 0001 0010 1111? �or 00000 00001 11111?
>
> Thanks,
>
> Frankie
You must have enough Viterbi states to represent all of the possible
values for the channel's memory. So, if your channel model uses the
current bit as well as the last 4 bits, then you need 2^4 = 16 states.
Jason
Reply by Fan.Zhang●January 7, 200920090107
Hi All,
I am learning viterbi equalization to deal with ISI caused by multichannel
effect.
Let us denote L as the channel memory, that means we have L+1 channel
taps. like this figure below. i.g. L=4
In DDDD
    
    
h0 h1 h2 h3 h4
    
    
SIGMA


Out
When we do viterbi algorithm, how many bits we need for each state in
trellis? 4 or 5? And why? I prefer 5, but I am not sure.
0000 0001 0010 1111? or 00000 00001 11111?
Thanks,
Frankie