The TI reference design docs are useful, but in my opinion the more useful
reference
design is Spectrum Digital's 6416T DSK board
(http://c6000.spectrumdigital.com/dsk6416/), since SD actually builds a real
product
from the design and sells 100s of boards. That means the design is tested
and
debugged over time, vs. a wide variety of applications.
The SDRAM devices used on the 6416T DSK board are rated at 166 MHz. SD's
doc doesn't
show a 150 MHz setting, but you could easily obtain a DSK 6416T board, set
EMIFA
clock rate to 150 MHz, run your code, and see what happens. To me, that would
be a
reliable test to prove a 150 MHz SDRAM design.
-Jeff
Reply by shad...@yahoo.com●June 17, 20082008-06-17
A couple of things... [I am extrapolating from my experience as to reasoning]
1. Do you have a 6416 or 6416T?? If it is a 'T', you should use
the
'T' datasheet.
2. The 133 Mhz EMIF rating is for general purpose/cookbook [but not
'sloppy'] design. Today's average engineer wants to be told
'the
answer' as to what RAM to use. The 133 Mhz number is a bit
conservative and allows for other devices or larger memory arrays on
the EMIF.
3. App note is very clear about special constraints that must be met
which are beyond the scope of a normal datasheet -
"NOTE: The reference design (four x16 SDRAM chips and NO other loads)
is the ONLY
supported 150 MHz EMIFA configuration. You must use the reference
layout for the EMIFA
traces exactly as they are in the design database. Due to the extreme
performance, margins are
very tight, and TI will not support other configurations or layouts at
150 MHz. 133 MHz or slower
can be achieved by following methodologies laid out in the device data
sheets or other TI
application reports."
The same conclusion could have likely been reached by a real engineer
evaluating the timing of the individual signals and the timing of the
SDRAM device.
mikedunn
--
www.dsprelated.com/blogs-1/nf/Mike_Dunn.php
Reply by shad...@yahoo.com●June 17, 20082008-06-17
> In reference design for C6416 provided from TI, the
SDRAM (supporting
> 167MHz) clock frequency is 150 MHz.
>
> However, the maximum EMIF frequency is 133 MHz in the datasheet of
> TMS320C6416 (@720MHz,7E).
>
> How is it possible?
What reference design? The 6416T DSK board? If so, that board runs the DSP at
1 GHz
so maximum EMIF freq is going to be higher.
-Jeff
Reply by shadowfree21c●June 16, 20082008-06-16
Hi, all.
In reference design for C6416 provided from TI, the SDRAM (supporting
167MHz) clock frequency is 150 MHz.
However, the maximum EMIF frequency is 133 MHz in the datasheet of
TMS320C6416 (@720MHz,7E).