In contradiction to the behaviour described in the Users Manual
(DSP56F801-7UM/D - Rev. 3.0, Chapter 184.108.40.206), we observe PWM
outputs being re-enabled within a PWM cycle as soon as the Fault
input (configured for automatic fault clearing) returns to zero.
The Chip Errata (DSP56F807E/D Rev. 9.0, 1/2003, Page 5) states that
this is a problem of Revision D DSP56F807 devices. Will there be a
new revision that solves this issue? Regards,