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Dear All, In contradiction to the behaviour described in the Users Manual (DSP56F801-7UM/D - Rev. 3.0, Chapter 11.5.8.2), we observe PWM outputs being re-enabled within a PWM cycle as soon as the Fault input (configured for automatic fault clearing) returns to zero. The Chip Errata (DSP56F807E/D Rev. 9.0, 1/2003, Page 5) states that this is a problem of Revision D DSP56F807 devices. Will there be a new revision that solves this issue? Regards, Frank Bertling |