Reply by ashsanjose ●November 25, 20022002-11-25
Is C6711 ext. memory not covered by MAR registers cacheable or not?

I notice that the MAR registers each have a control bit to make memory
cacheable from 0xA0000000 to 0xA3FFFFFF for the 0xA0000000-0xAFFFFFFF
area of
memory.

Is the memory from 0xA4000000-0xAFFFFFFF cacheable or not-cacheable?

thanks,

Dan Ash