I have replaced the McBSP configuration with a fully commented version.
Please note the 'should be' and 'missing' comments.
A '????' means I'm not sure of what the value should be set
to.
R. Williams
---------- Original Message -----------
From: b...@gmail.com
To: c...
Sent: Mon, 31 May 2010 18:29:41 -0400
Subject: [c6x] Re: McBSP 32 and 8 bit transfer
> I have McBSP port set as below:
> I want to obtain interrupt on FSR high to low transition.
> Unfortunately this do not work. Can you investiagte? Just to make it
> clear in main program I am using symbolic for this 2h. It complies
> properly. MCBSP_FMKS(SPCR, RINTM, 2h) | /* 2h RINT is
> generated by a new frame synchronization. */
>
> If you find any error let me know.
>
> BR/ Mike
> MCBSP_Config mcbspCfg0 = {
/* serial port control register (SPCR) */
MCBSP_FMKS(SPCR, FREE, YES) | /* #25:continue to run when
emulator stopped */
MCBSP_FMKS(SPCR, SOFT, YES) | /* #24:has no effect when
'FREE'
=1 */
MCBSP_FMKS(SPCR, FRST, YES) | /* #23:Frame sync signal is
generated */
MCBSP_FMKS(SPCR, GRST, YES) | /* #22:Sample rate generator is
out of reset */
MCBSP_FMKS(SPCR, XINTM, XRDY) | /* #21-20:=0,Transmit interrupt
mode XINT driven by XRDY */
MCBSP_FMKS(SPCR, XSYNCERR, NO) | /* #19:=0, xmit sync error
condition not forced */
/* #18: XEMPTY status bit, write
has no effect */
/* #17: XRDY status bit, write
has no effect */
MCBSP_FMKS(SPCR, XRST, YES) | /* #16: should be=0 (xmit in
reset state)
to be enabled later in code
execution sequence
serial port transmiter is
enabled */
MCBSP_FMKS(SPCR, DLB, OFF) | /* #15: should be=1 (digital
loop back enabled)
DIGITAL LOOPBACK MODE
ENABLED! */
MCBSP_FMKS(SPCR, RJUST, RZF) | /* #14-13: right justify zero
fill msb */
MCBSP_FMKS(SPCR, CLKSTP, DISABLE) | /* #12-11: disable the clk stop
feature between data transmits
so xmit clock runs
continuously */
/* #10-8: reserved */
MCBSP_FMKS(SPCR, DXENA, OFF) | /* #7: only needed for multi bus
master sync operations */
/* #6: reserved */
MCBSP_FMKS(SPCR, RINTM, 2h) | /* #5-4: should be=0, driven by
RRDY
2h RINT is generated by a new
frame synchronization. */
MCBSP_FMKS(SPCR, RSYNCERR, NO) | /* #3: =0, Receive sync error
condition not forced */
/* #2: RFULL, status bit, write
has no effect */
/* #1: RRDY, status bit, write
has no effect */
MCBSP_FMKS(SPCR, RRST, YES), /* #0: should be=0,
so receiver is in in reset state
to be enabled later in code
execution sequence
serial port receiver is
enabled */
/* Receive control register RCR */
MCBSP_FMKS(RCR, RPHASE, SINGLE) | /* #31: -0 (single phase) single
or dual phase selector */
MCBSP_FMKS(RCR, RFRLEN2, OF(0)) | /* #30-24: has no effect when
single phase receiver
specifies the receive frame
length (number of words)
when in dual phase */
MCBSP_FMKS(RCR, RWDLEN2, 8BIT) | /* #23-21: has no effect when in
single phase receive
specifies the receive word
length (bits in word) */
MCBSP_FMKS(RCR, RCOMPAND, MSB) | /* #20-19: =0, msb received
first */
MCBSP_FMKS(RCR, RFIG, YES) | /* #18: =1, ignore unexpected
receive sync bits
receive frame ignore bit -
receive frame-synchronization
pulses
after the first pulse
restarts the transfer */
MCBSP_FMKS(RCR, RDATDLY, 0BIT) | /* #17-16:receive data delay -
0 bit receive data delay */
/* #15: reserved, writes have no
effect */
MCBSP_FMKS(RCR, RFRLEN1, OF(0)) | /* #14-8: (RFRLEN1+1) specifies
the receive frame length
(number of words in phase 1)
- 1words in phase 1 */
MCBSP_FMKS(RCR, RWDLEN1, 8BIT) | /* #7-5: =0, 8 bits per received
word */
MCBSP_FMKS(RCR, RWDREVRS, DISABLE), /* #4: bits received MSB
first */
/* #3-0, reserved, writes have
no effect */
/* Transmit control register XCR */
MCBSP_FMKS(XCR, XPHASE, SINGLE) | /* #31: =0, (single phase)
single or dual phase selector */
MCBSP_FMKS(XCR, XFRLEN2, OF(0)) | /* #31-24: has no effect when in
single phase transmitter */
MCBSP_FMKS(XCR, XWDLEN2, 8BIT) | /* #23-21: has no effect when in
single phase transmitter
specifies the transmit frame
length (number of words)
when in dual phase */
MCBSP_FMKS(XCR, XCOMPAND, MSB) | /* #20-19: = 0, msb transmitted
first */
MCBSP_FMKS(XCR, XFIG, YES) | /* #18:, =1, ignore unexpected
transmit sync bits
Transmit frame ignore bit.
Transmit frame-
synchronization pulses
after the first pulse
restarts the transfer. */
MCBSP_FMKS(XCR, XDATDLY, 0BIT) | /* #17-16: transmit data delay,
- 0 bit transmit delay */
/* #15: reserved, write have no
effect */
MCBSP_FMKS(XCR, XFRLEN1, OF(0)) | /* #14-8: (XRFLEN1+1) specifies
the transmit frame length
(number of words in phase 1)
- 1words in phase 1 */
MCBSP_FMKS(XCR, XWDLEN1, 8BIT) | /* #7-5: = 0, 8 bits per
transmitted word */
MCBSP_FMKS(XCR, XWDREVRS, DISABLE), /* #4: bits transmitted MSB
first */
/* #3-0: reserved, writes have
no effect */
/* Sample Rate Generator Register (SRGR) */
MCBSP_FMKS(SRGR, GSYNC, FREE) | /* #31: =0, sample rate
generator is free running */
MCBSP_FMKS(SRGR, CLKSP, RISING) | /* #30: has no effect when GSYNC
is free running */
MCBSP_FMKS(SRGR, CLKSM, INTERNAL) | /* #29: sample rate genererator
derived from CPU clock */
MCBSP_FMKS(SRGR, FSGM, DXR2XSR) | /* #28: generate FSX on DXR to
XSR data transfer */
MCBSP_FMKS(SRGR, FPER, OF(63)) | /* #27-16: ignored when FSGM
DXR2XSR */
MCBSP_FMKS(SRGR, FWID, OF(31)) | /* #15-8: ignored when FSGM
DXR2XSR */
MCBSP_FMKS(SRGR, CLKGDV, OF(15)), /* #7-0: CPU clock divider, for
generating CLKG */
/* Pin Control Register (PCR) */
/* #31-14: reserved, writes have
no effect */
MCBSP_FMKS(PCR, XIOEN, SP) | /* #13: =1, dx, fsx, clkx pins
are set as serial port */
MCBSP_FMKS(PCR, RIOEN, SP) | /* #12: =1, dr, fsr, clkr, clks
pins are set as serial port */
MCBSP_FMKS(PCR, FSXM, INTERNAL) | /* #11: =1, FSX signal derived
from SRGR(FSGM)) */
MCBSP_FMKS(PCR, FSRM, INTERNAL) | /* #10: =1, FSR signal derived
from sample rate generator ???? */
MCBSP_FMKS(PCR, CLKXM, OUTPUT) | /* #9: =1, CLKX is driven by
sample rate generator */
MCBSP_FMKS(PCR, CLKRM, INPUT) | /* #8: =0, CLKR is driven by
CLKX (Digital loop back mode) */
/* #7: reserved, writes have no
effect */
MCBSP_FMKS(PCR, CLKSSTAT, 0) | /* #6: CLKS pin refelect a logic
low. */
MCBSP_FMKS(PCR, DXSTAT, 0) | /* #5: DX pin reflects a logic
low */
/* $4: missing>DR pin is state
is not defined */
MCBSP_FMKS(PCR, FSXP, ACTIVEHIGH) | /* #3: FSX active state is high
*/
MCBSP_FMKS(PCR, FSRP, ACTIVEHIGH) | /* #2: FSR active state is high
*/
MCBSP_FMKS(PCR, CLKXP, RISING) | /* #1: xmit data valid on rising
edge of clock */
MCBSP_FMKS(PCR, CLKRP, FALLING) /* #0: recv data sampled on
falling edge of clock */
};
> Hi,
> >
> >I have a doubt while configuring port. I want to transfer 8 bit of data into
external device through McBSP. I set in XCR lenght of word XWDLEN1 to 8
bit and
this is one phase configuration. > >I am not sure if I can use in this case api function
MCBSP_write cos it's 32 bit value direct write. MCBSP(hMcbsp, 0x12345678). Can I sent in this way
only 8
bits? If not how can I sent this 8 bit into port? > >
> >I am even more confused when receiving data, accordingly there is api func.
called x=MCBSP_read(hMcbsp); can I read for example 8 bits if I set also
receiver into 8 bit mode? This function is also 32 bit direct read of DRR. How
differently can I read those 8 bits of incoming data? > >
> >I look forward for any opinion of experienced in this issue people.
> >
> >Regards,
> >Mike
> >
> >_____________________________________
> >
> > ------- End of Original Message -------
_____________________________________
Reply by bedn...@gmail.com●May 31, 20102010-05-31
I have McBSP port set as below:
I want to obtain interrupt on FSR high to low transition. Unfortunately this do
not work. Can you investiagte?
Just to make it clear in main program I am using symbolic for this 2h. It
complies properly. MCBSP_FMKS(SPCR, RINTM, 2h) | /* 2h RINT is
generated by a new frame synchronization. */
If you find any error let me know.
BR/ Mike
MCBSP_Config mcbspCfg0 = {
MCBSP_FMKS(SPCR, FREE, YES) | /* Free runinig mode is enabled
*/
MCBSP_FMKS(SPCR, SOFT, YES) | /* */
MCBSP_FMKS(SPCR, FRST, YES) | /* */
MCBSP_FMKS(SPCR, GRST, YES) | /* Sample rate generator is out
of
reset */
MCBSP_FMKS(SPCR, XINTM, XRDY) | /* Transmit interrupt mode XINT
driven by XRDY */
MCBSP_FMKS(SPCR, XSYNCERR, NO) | /* */
MCBSP_FMKS(SPCR, XRST, YES) | /* serial port transmiter is
enabled */
MCBSP_FMKS(SPCR, DLB, OFF) | /* DIGITAL LOOPBACK MODE ENABLED!
*/
MCBSP_FMKS(SPCR, RJUST, RZF) | /* right justify zero fill msb
*/
MCBSP_FMKS(SPCR, CLKSTP, DISABLE) | /* */
MCBSP_FMKS(SPCR, DXENA, OFF) | /* */
MCBSP_FMKS(SPCR, RINTM, 2h) | /* 2h RINT is generated by a new
frame synchronization. */
MCBSP_FMKS(SPCR, RSYNCERR, NO) | /* */
MCBSP_FMKS(SPCR, RRST, YES), /* serial port receiver is enabled */
MCBSP_FMKS(RCR, RPHASE, SINGLE) | /* single or dual phase */
MCBSP_FMKS(RCR, RFRLEN2, OF(0)) | /* specifies the receive frame
length (number of words) in phase 2. */
MCBSP_FMKS(RCR, RWDLEN2, 8BIT) | /* */
MCBSP_FMKS(RCR, RCOMPAND, MSB) | /* msb go first */
MCBSP_FMKS(RCR, RFIG, YES) | /* receive frame ignore bit ->
receive fram-synchronization pulses after the first pulse restarts the
transfer
*/
MCBSP_FMKS(RCR, RDATDLY, 0BIT) | /* receive data delay -> 0 bit
data delay */
MCBSP_FMKS(RCR, RFRLEN1, OF(0)) | /* (RFRLEN1+1) specifies the
receive frame lenght (number of worlds in phase 1) -> 2words in phase 1 */
MCBSP_FMKS(RCR, RWDLEN1, 8BIT) | /* */
MCBSP_FMKS(RCR, RWDREVRS, DISABLE), /* reversal mode for 32bit
transfer
*/
/* Transmit control register XCR */
MCBSP_FMKS(XCR, XPHASE, SINGLE) | /* phase single */
MCBSP_FMKS(XCR, XFRLEN2, OF(0)) | /* */
MCBSP_FMKS(XCR, XWDLEN2, 8BIT) | /* */
MCBSP_FMKS(XCR, XCOMPAND, MSB) | /* MSB go first */
MCBSP_FMKS(XCR, XFIG, YES) | /* Transmit frame ignore bit.
Transmit frame-synchronization pulses after the first pulse restarts the
transfer. */
MCBSP_FMKS(XCR, XDATDLY, 0BIT) | /* transmit data delay */
MCBSP_FMKS(XCR, XFRLEN1, OF(0)) | /* */
MCBSP_FMKS(XCR, XWDLEN1, 8BIT) | /* */
MCBSP_FMKS(XCR, XWDREVRS, DISABLE), /* reversal mode disabled */
MCBSP_FMKS(PCR, XIOEN, SP) |/* dx, fsx, clkxp are set as
serial
port */
MCBSP_FMKS(PCR, RIOEN, SP) |/* dr, fsr, clks are set as
serial
port */
MCBSP_FMKS(PCR, FSXM, INTERNAL) | /* */
MCBSP_FMKS(PCR, FSRM, INTERNAL) |
MCBSP_FMKS(PCR, CLKXM, OUTPUT) |
MCBSP_FMKS(PCR, CLKRM, INPUT) |
MCBSP_FMKS(PCR, CLKSSTAT, 0) |
MCBSP_FMKS(PCR, DXSTAT, 0) |
MCBSP_FMKS(PCR, FSXP, ACTIVEHIGH) |
MCBSP_FMKS(PCR, FSRP, ACTIVEHIGH) |
MCBSP_FMKS(PCR, CLKXP, RISING) |
MCBSP_FMKS(PCR, CLKRP, FALLING)
};
Hi, >
>I have a doubt while configuring port. I want to transfer 8 bit of data into
external device through McBSP. I set in XCR lenght of word XWDLEN1 to 8 bit and
this is one phase configuration.
>I am not sure if I can use in this case api function MCBSP_write cos it's
32 bit value direct write. MCBSP(hMcbsp, 0x12345678). Can I sent in this way
only 8 bits? If not how can I sent this 8 bit into port?
>
>I am even more confused when receiving data, accordingly there is api func.
called x=MCBSP_read(hMcbsp); can I read for example 8 bits if I set also
receiver into 8 bit mode? This function is also 32 bit direct read of DRR. How
differently can I read those 8 bits of incoming data?
>
>I look forward for any opinion of experienced in this issue people.
>
>Regards,
>Mike
>
>_____________________________________
_____________________________________
Reply by Richard Williams●May 31, 20102010-05-31
Bednyk,
Since the timer0 interrupt works, but, neither McBSP0 interrupt works, the
problem is not in the interrupts.
I suspect the problem is in the configuration parameters set into the McBSP0.
For instance, the parameter that says to allow the Receive interrupt.
can you post your parameters, with comments?
R. Williams
---------- Original Message -----------
From: b...@gmail.com
To: c...
Sent: Sun, 30 May 2010 15:11:19 -0400
Subject: [c6x] Re: McBSP 32 and 8 bit transfer
> Hi,
>
> I still have some problems with interrupts handling my McBSP0 port. I
> have configured interrupts as below:
> > > IRQ_setVecs(vectors); /* point to the IRQ vector table
> */
> > >
> > > /* Map TIMER events to physical interrupt number */
> > > //IRQ_map(TimerEventId, 14);
> > > IRQ_map(IRQ_EVT_TINT1, 14);
> > > IRQ_map(IRQ_EVT_TINT2, 11);
> > > IRQ_clear(IRQ_EVT_TINT1);
> > >
> > > IRQ_map(IRQ_EVT_XINT0, 12); // McBSP transmit
> > > IRQ_map(IRQ_EVT_RINT0, 13); // McBSP receive
> > > IRQ_clear(IRQ_EVT_XINT0);
> > > IRQ_clear(IRQ_EVT_RINT0);
> > >
> > > /* Reset the timer events */
> > > IRQ_reset(TimerEventId);
> > >
> > > IRQ_globalEnable(); /* Globally enable interrupts
> */
> > > IRQ_enable(IRQ_EVT_TINT1);
> > > IRQ_enable(IRQ_EVT_TINT2);
> > > IRQ_enable(IRQ_EVT_XINT0);
> > > IRQ_enable(IRQ_EVT_RINT0);
> > > IRQ_nmiEnable(); /* Enable NMI interrupt
>
> I am sending data to McBSP port in interrupt from Timer1 and it works.
> Now I have configured interrupts for RINT0, my McBSP dev0 is setup in
> digital loopback mode. I can seen that data occurs on DRR0 but no
> interrup EVT_RINT0 is generated. Can you give me example how to setup
> interrupts for McBSP port using CSL librery?
>
> I look forward for information. Any help will be appreiciated.
>
> BR/ Mike ------- End of Original Message -------
_____________________________________
Reply by bedn...@gmail.com●May 30, 20102010-05-30
Hi,
I still have some problems with interrupts handling my McBSP0 port. I have
configured interrupts as below: > > IRQ_setVecs(vectors); /* point to the IRQ
vector table */ > >
> > /* Map TIMER events to physical interrupt number */
> > //IRQ_map(TimerEventId, 14);
> > IRQ_map(IRQ_EVT_TINT1, 14);
> > IRQ_map(IRQ_EVT_TINT2, 11);
> > IRQ_clear(IRQ_EVT_TINT1);
> >
> > IRQ_map(IRQ_EVT_XINT0, 12); // McBSP transmit
> > IRQ_map(IRQ_EVT_RINT0, 13); // McBSP receive
> > IRQ_clear(IRQ_EVT_XINT0);
> > IRQ_clear(IRQ_EVT_RINT0);
> >
> > /* Reset the timer events */
> > IRQ_reset(TimerEventId);
> >
> > IRQ_globalEnable(); /* Globally enable interrupts */ > > IRQ_enable(IRQ_EVT_TINT1);
> > IRQ_enable(IRQ_EVT_TINT2);
> > IRQ_enable(IRQ_EVT_XINT0);
> > IRQ_enable(IRQ_EVT_RINT0);
> > IRQ_nmiEnable(); /* Enable NMI interrupt
I am sending data to McBSP port in interrupt from Timer1 and it works. Now I
have configured interrupts for RINT0, my McBSP dev0 is setup in digital loopback
mode. I can seen that data occurs on DRR0 but no interrup EVT_RINT0 is
generated. Can you give me example how to setup interrupts for McBSP port using
CSL librery?
I look forward for information. Any help will be appreiciated.
BR/ Mike
_____________________________________
Reply by Richard Williams●May 4, 20102010-05-04
bednyk,
I noticed a little oops in my example.
The two calls to IRQ_map() that are located before the beginning of the main()
function should actually be the prototypes for the McBSP XINT and RINT
functions.
interrupt void c_int12();
interrupt void c_int13();
Sorry for the confusion.
---------- Original Message -----------
From: "Richard Williams"
To: b...@gmail.com, c...
Sent: Tue, 4 May 2010 09:52:37 -0700
Subject: Re: [c6x] Re: McBSP 32 and 8 bit transfer
>
>
> bednyk,
>
> I have not checked your setup of the McBSP.
> However, I did notice the following...
>
> I see the timer1 interrupt writes to the McBSP, without checking that the
McBSP is available for writing.
> I see the McBSP transmit interrupt writes to the McBSP.
> The McBSP transmit interrupt will keep the McBSP transmitting at the max
possible rate.
> so the timer1 interrupt call to McBSP_Write() will find the write occurring
while the McBSP is busy.
> For the above reason,
> *I* would remove the call to McBSP_Write() from the McBSP transmit interrupt
function.
>
> Here is a somewhat snipped example of setting up and using the McBSP
> MCBSP_Handle hMcbsp0; /* handle for McBSP0 */
> extern far void vectors();
> void ConfigMcBSP(void);
> IRQ_map(IRQ_EVT_XINT0, 12); // McBSP transmit
> IRQ_map(IRQ_EVT_RINT0, 13); // McBSP receive
>
> void main(void)
> {
> int waittime;
>
> CSL_init();
> IRQ_nmiEnable();
> IRQ_globalEnable();
> IRQ_setVecs(vectors);
>
> IRQ_map(IRQ_EVT_XINT0, 12); // McBSP transmit
> IRQ_map(IRQ_EVT_RINT0, 13); // McBSP receive
> ConfigMcBSP();
>
> IRQ_disable(IRQ_EVT_XINT0);
> IRQ_disable(IRQ_EVT_RINT0);
> IRQ_clear(IRQ_EVT_XINT0);
> IRQ_clear(IRQ_EVT_RINT0);
> IRQ_Enable(IRQ_EVT_XINT0);
> IRQ_Enable(IRQ_EVT_RINT0);
> IRQ_start(IRQ_EVT_XINT0);
> IRQ_start(IRQ_EVT_RINT0);
>
> /* Start Sample Rate Generator: set /GRST = 1 */
> MCBSP_enableSrgr(hMcbsp0);
>
> /* inserted wait time for McBSP to get ready */
> for (waittime=0; waittime<0xF; waittime++);
>
> /* Wake up the McBSP as transmitter and receiver */
> MCBSP_enableRcv(hMcbsp0);
> MCBSP_enableXmt(hMcbsp0);
>
> /* Enable Frame Sync Generator for McBSP 0: set /FRST = 1 */
> MCBSP_enableFsync(hMcbsp0);
>
> MCBSP_Write(hMcbsp0, y); // get the ball rolling
> while( 1 );
> }
>
> void ConfigMcBSP(void)
> {
> MCBSP_Config mcbspCfg0 = {
> .............
> };
>
> hMcbsp0 = MCBSP_open(MCBSP_DEV0, MCBSP_OPEN_RESET);
> MCBSP_config( hMcBSP0, &mcbspCfg0 );
> return;
> }
>
> R. Williams
>
> ---------- Original Message -----------
> From: b...@gmail.com
> To: c...
> Sent: Tue, 04 May 2010 06:53:39 -0400
> Subject: [c6x] Re: McBSP 32 and 8 bit transfer
>
> > Hi,
> >
> > You are right that best way was to check it on board - right now 8 bit
transfers work correct. I was using polling method for write and read:
> > /* wait until the transmitter is ready for a sample then write to it */
> > while (!MCBSP_xrdy(hMcbsp0));
> > MCBSP_write(hMcbsp0,y);
> >
> > /* now wait until the value is received then read it */
> > while (!MCBSP_rrdy(hMcbsp0));
> >
> > I would like to use interrupts in my program. Unfortunatelly I have probelm
with setup of it. Below is code from my project:
> >
> > #include
> > #include
> > #include
> > #include
> > #include
> >
> > /* */
> > void initMcbsp(void);
> > extern far void vectors();
> > interrupt void c_int14();
> > interrupt void c_int11();
> > interrupt void c_int12();
> > interrupt void c_int13();
> > static TIMER_Handle hTimer1;
> > static TIMER_Handle hTimer2;
> > static Uint32 TimerEventId;
> > static GPIO_Handle hGpio;
> > Uint32 Current_dir;
> > MCBSP_Handle hMcbsp0; // McBSP0 handle for loopback mode
> >
> > /* McBSP codec data channel configuration */
> > MCBSP_Config mcbspCfg0 = {
> > MCBSP_FMKS(SPCR, FREE, YES) | /* Free runinig mode is enabled
*/
> > MCBSP_FMKS(SPCR, SOFT, YES) | /* */
> > MCBSP_FMKS(SPCR, FRST, YES) | /* */
> > MCBSP_FMKS(SPCR, GRST, YES) | /* Sample rate generator is out
of reset */
> > MCBSP_FMKS(SPCR, XINTM, XRDY) | /* Transmit interrupt mode XINT
driven by XRDY */
> > MCBSP_FMKS(SPCR, XSYNCERR, NO) | /* */
> > MCBSP_FMKS(SPCR, XRST, YES) | /* serial port transmiter is
enabled */
> > MCBSP_FMKS(SPCR, DLB, ON) | /* DIGITAL LOOPBACK MODE
ENABLED! */
> > MCBSP_FMKS(SPCR, RJUST, RZF) | /* right justify zero fill msb
*/
> > MCBSP_FMKS(SPCR, CLKSTP, DISABLE) | /* */
> > MCBSP_FMKS(SPCR, DXENA, OFF) | /* */
> > MCBSP_FMKS(SPCR, RINTM, RRDY) | /* RINT driven by RRDY */
> > MCBSP_FMKS(SPCR, RSYNCERR, NO) | /* */
> > MCBSP_FMKS(SPCR, RRST, YES), /* serial port receiver is
enabled */
> >
> > MCBSP_FMKS(RCR, RPHASE, SINGLE) | /* single or dual phase */
> > MCBSP_FMKS(RCR, RFRLEN2, OF(0)) | /* specifies the receive frame
length (number of words) in phase 2. */
> > MCBSP_FMKS(RCR, RWDLEN2, 8BIT) | /* */
> > MCBSP_FMKS(RCR, RCOMPAND, MSB) | /* msb go first */
> > MCBSP_FMKS(RCR, RFIG, YES) | /* receive frame ignore bit ->
receive fram-synchronization pulses after the first pulse restarts the transfer
*/
> > MCBSP_FMKS(RCR, RDATDLY, 0BIT) | /* receive data delay -> 0 bit
data delay */
> > MCBSP_FMKS(RCR, RFRLEN1, OF(0)) | /* (RFRLEN1+1) specifies the
receive frame lenght (number of worlds in phase 1) -> 2words in phase 1 */
> > MCBSP_FMKS(RCR, RWDLEN1, 8BIT) | /* */
> > MCBSP_FMKS(RCR, RWDREVRS, DISABLE), /* reversal mode for
32bit transfer */
> > /* Transmit control register XCR */
> > MCBSP_FMKS(XCR, XPHASE, SINGLE) | /* phase single */
> > MCBSP_FMKS(XCR, XFRLEN2, OF(0)) | /* */
> > MCBSP_FMKS(XCR, XWDLEN2, 8BIT) | /* */
> > MCBSP_FMKS(XCR, XCOMPAND, MSB) | /* MSB go first */
> > MCBSP_FMKS(XCR, XFIG, YES) | /* Transmit frame ignore bit.
Transmit frame-synchronization pulses after the first pulse restarts the
transfer. */
> > MCBSP_FMKS(XCR, XDATDLY, 0BIT) | /* transmit data delay */
> > MCBSP_FMKS(XCR, XFRLEN1, OF(0)) | /* */
> > MCBSP_FMKS(XCR, XWDLEN1, 8BIT) | /* */
> > MCBSP_FMKS(XCR, XWDREVRS, DISABLE), /* reversal mode
disabled */
> >
> > MCBSP_FMKS(SRGR, GSYNC, FREE) |
> > MCBSP_FMKS(SRGR, CLKSP, RISING) |
> > MCBSP_FMKS(SRGR, CLKSM, INTERNAL) |
> > MCBSP_FMKS(SRGR, FSGM, DXR2XSR) |
> > MCBSP_FMKS(SRGR, FPER, OF(63)) | /* is ignored when FSGM,
DXR2XSR */
> > MCBSP_FMKS(SRGR, FWID, OF(31)) | /* is ignored when FSGM,
DXR2XSR */
> > MCBSP_FMKS(SRGR, CLKGDV, OF(15)), /* devider */
> >
> > MCBSP_MCR_DEFAULT,
> > MCBSP_RCERE0_DEFAULT,
> > MCBSP_RCERE1_DEFAULT,
> > MCBSP_RCERE2_DEFAULT,
> > MCBSP_RCERE3_DEFAULT,
> > MCBSP_XCERE0_DEFAULT,
> > MCBSP_XCERE1_DEFAULT,
> > MCBSP_XCERE2_DEFAULT,
> > MCBSP_XCERE3_DEFAULT,
> >
> > MCBSP_FMKS(PCR, XIOEN, SP) |/* dx, fsx, clkxp are set as
serial port */
> > MCBSP_FMKS(PCR, RIOEN, SP) |/* dr, fsr, clks are set as
serial port */
> > MCBSP_FMKS(PCR, FSXM, INTERNAL) | /* */
> > MCBSP_FMKS(PCR, FSRM, INTERNAL) |
> > MCBSP_FMKS(PCR, CLKXM, OUTPUT) |
> > MCBSP_FMKS(PCR, CLKRM, INPUT) |
> > MCBSP_FMKS(PCR, CLKSSTAT, 0) |
> > MCBSP_FMKS(PCR, DXSTAT, 0) |
> > MCBSP_FMKS(PCR, FSXP, ACTIVEHIGH) |
> > MCBSP_FMKS(PCR, FSRP, ACTIVEHIGH) |
> > MCBSP_FMKS(PCR, CLKXP, RISING) |
> > MCBSP_FMKS(PCR, CLKRP, FALLING)
> > };
> >
> > static Uint32 TimerControl = TIMER_CTL_RMK( /* Timer control register
(CTL)*/
> >
> > TIMER_CTL_TSTAT_0,
> >
> > TIMER_CTL_INVINP_NO, /* TINP inverter control(INVINP). Only affects
operation
> > if CLKSRC =0.
> > TIMER_CTL_INVINP_NO - Uninverted TINP drives timer
> > TIMER_CTL_INVINP_YES - inverted TINP drives timer
*/
> >
> > TIMER_CTL_CLKSRC_CPUOVR8,/* Timer input clock source (CLKSRC)
> > TIMER_CTL_CLKSRC_CPUOVR4 - CPU clock /4
*/
> >
> > TIMER_CTL_CP_PULSE, /* Clock/pulse mode(CP)
> > TIMER_CTL_CP_PULSE - Pulse mode.TSTAT is
active one
> > CPU clock after the timer reaches the
timer
> > period.PWID determines when it goes
inactive.*/
> >
> > TIMER_CTL_HLD_NO, /* Hold(HLD). Counter may be read or written regardless
of
> > HLD value.
> > TIMER_CTL_HLD_YES - Counter is disabled and
held in
> > current value.
> > TIMER_CTL_HLD_NO - COunter is allowed to
count. */
> >
> > TIMER_CTL_GO_NO, /* Go bit(GO). Resets and starts the timer counter.
> > TIMER_CTL_GO_NO - No effects on the timer.
> > TIMER_CTL_GO_YES - if HLD =1, the counter
register
> > is zeroed and begins counting on next
clock. */
> > TIMER_CTL_PWID_ONE, /* Pulse width(PWID). Only used in pulse mode.
> > TIMER_CTL_PWID_ONE - TSTAT goes inactive one
timer
> > input clock cycle after the timer
counter value
> > equals the timer period value.
> > TIMER_CTL_PWID_TWO - TSTAT goes inactive one timer
> > input clock cycle after the timer
counter value
> > equals the timer period value.
*/
> > //TIMER_CTL_DATIN_0,
> >
> > TIMER_CTL_DATOUT_0, /* Data output (DATOUT).
> > TIMER_CTL_DATOUT_0 - If FUNC =0,the DATOUT
is
> > driven on TOUT.
> > TIMER_CTL_DATOUT_1 - If FUNC =1,The DATOUT is
driven
> > on TOUT after inversion by INVOUT.
*/
> >
> > TIMER_CTL_INVOUT_NO, /* TOUT inverter control (INVOUT)
> > TIMER_CTL_INVOUT_NO - Uninverted TSTAT drives
TOUT
> > TIMER_CTL_INVOUT_YES - Inverted TSTAT drives
TOUT.*/
> > TIMER_CTL_FUNC_GPIO /* Function of TOUT pin(FUNC).
> > TIMER_CTL_FUNC_GPIO - TOUT0 is a general
purpose
> > output pin
> > TIMER_CTL_FUNC_TOUT - TOUT is a timer output pin
*/
> > );
> >
> > GPIO_Config MyConfig = {
> > 0x00000011, /* gpgc Global Control Register was 31 modified */
> > 0x00007FFF, /* gpen Enable Register all 15 GPIO are acive */
> > 0x00001000, /* 1 */
> > 0x00000800, /* gpval Value Register GP12 is set high */
> > 0x00000000, /* gplm Low Mask Register used to configure iterupts disabled
*/
> > 0x00000000 /*gppol Interrupt Polarity Register */
> > };
> >
> > volatile Uint32 x,y;
> > int z=0x000000A;
> > void main(void)
> > {
> >
> > int success = 0;
> >
> > CSL_init();
> >
> > x=1;
> > /* Open TIMER1 device, and reset them to power-on default state */
> > hTimer1 = TIMER_open(TIMER_DEV1, TIMER_OPEN_RESET);
> > hTimer2 = TIMER_open(TIMER_DEV2, TIMER_OPEN_RESET);
> > /* Obtain the event ID for the timer device */
> > TimerEventId = TIMER_getEventId(hTimer1);
> >
> > GPIO_config(hGpio, &MyConfig);
> > hGpio = GPIO_open(GPIO_DEV0, GPIO_OPEN_RESET);
> >
> > /* Configure the timer devices */
> > TIMER_configArgs(hTimer1,
> > TimerControl, /* use predefined control value */
> > 0x07735940, /* set period 8ns*7735940=1s */ //2540BE40 = 5s
> > 0x00000000 /* start count value at zero */
> > );
> >
> > /* Configure the timer devices */
> > TIMER_configArgs(hTimer2,
> > TimerControl, /* use predefined control value */
> > 0x2540BE40, /* set period 8ns*7735940=1s */ //2540BE40 = 5s
> > 0x00000000 /* start count value at zero */
> > );
> >
> > Current_dir = GPIO_pinDirection(hGpio, GPIO_PIN7,GPIO_OUTPUT);
> > GPIO_pinWrite(hGpio,GPIO_PIN7,0);
> >
> > //GPIO_pinWrite(hGpio,GPIO_PIN7,0);
> >
> > IRQ_setVecs(vectors); /* point to the IRQ vector table */
> >
> > /* Map TIMER events to physical interrupt number */
> > //IRQ_map(TimerEventId, 14);
> > IRQ_map(IRQ_EVT_TINT1, 14);
> > IRQ_map(IRQ_EVT_TINT2, 11);
> > IRQ_clear(IRQ_EVT_TINT1);
> >
> > IRQ_map(IRQ_EVT_XINT0, 12); // McBSP transmit
> > IRQ_map(IRQ_EVT_RINT0, 13); // McBSP receive
> > IRQ_clear(IRQ_EVT_XINT0);
> > IRQ_clear(IRQ_EVT_RINT0);
> >
> > /* Reset the timer events */
> > IRQ_reset(TimerEventId);
> >
> > IRQ_globalEnable(); /* Globally enable interrupts */
> > IRQ_enable(IRQ_EVT_TINT1);
> > IRQ_enable(IRQ_EVT_TINT2);
> > IRQ_enable(IRQ_EVT_XINT0);
> > IRQ_enable(IRQ_EVT_RINT0);
> > IRQ_nmiEnable(); /* Enable NMI interrupt */
> >
> >
> >
> > y=0x00000001;
> > initMcbsp();
> > delay();
> >
> >
> > // IRQ_EVT_XINT0 12
> > // IRQ_EVT_RINT0 13
> > // TIMER_start(hTimer1);
> > MCBSP_write(hMcbsp0,y);
> > while(1)
> > {
> > //if (x == y)
> > //GPIO_pinWrite(hGpio,GPIO_PIN7,1); // można wyłaczyć na czas
tesów
> > ;
> > }
> > /* All done now, close the port. */
> > MCBSP_close(hMcbsp0);
> > // if (x == y) success =1;
> >
> > // if (success) GPIO_pinWrite(hGpio,GPIO_PIN7,1);
> > }
> > interrupt void c_int12() // for transmission
> > {
> > MCBSP_write(hMcbsp0,y);
> > IRQ_clear(IRQ_EVT_XINT0);
> > }
> > interrupt void c_int13() //for receive
> > {
> > x=MCBSP_read(hMcbsp0);
> > IRQ_clear(IRQ_EVT_RINT0);
> > }
> > interrupt void c_int14() //just test
> > {
> > y++;
> > if (y == 5) y=0;
> > MCBSP_write(hMcbsp0,y);
> > TIMER_setCount(hTimer1,0x00000000);
> > IRQ_clear(IRQ_EVT_TINT1);
> > }
> > interrupt void c_int11() //just test
> > {
> > IRQ_clear(IRQ_EVT_TINT2);
> > }
> >
> > int delay(void)
> > {
> > int i;
> > for (i=0;i<100;i++)
> > ;
> > return 0;
> > }
> >
> > void initMcbsp()
> > {
> > /* Let's open up serial port 0 */
> > hMcbsp0 = MCBSP_open(MCBSP_DEV0, MCBSP_OPEN_RESET);
> >
> > /* We'll set it up for digital loopback, 32bit mode. We have */
> > /* to setup the sample rate generator to allow self clocking. */
> > MCBSP_config(hMcbsp0, &mcbspCfg0);
> >
> > /* Now that the port is setup, let's enable it in steps. */
> > MCBSP_start(hMcbsp0, MCBSP_XMIT_START | MCBSP_RCV_START |
> > MCBSP_SRGR_START | MCBSP_SRGR_FRAMESYNC, 0x3000);
> > }
> >
> > In above code interrupts from timers are working fine (every 1 and 5
seconds), unfortunately I do not know why interrupts from McBSP are not working.
I made a debug session through program but cannot locate root of issue. How this
interrupts from McBSP should be setup? I mean IRQ_EVT_RINT0 and IRQ_EVT_XINT0
> >
> > Any help would really be appreciated.
> >
> > Rgs,
> > Mike
> ------- End of Original Message -------
Reply by Richard Williams●May 4, 20102010-05-04
bednyk,
I have not checked your setup of the McBSP.
However, I did notice the following...
I see the timer1 interrupt writes to the McBSP, without checking that the McBSP
is available for writing.
I see the McBSP transmit interrupt writes to the McBSP.
The McBSP transmit interrupt will keep the McBSP transmitting at the max
possible rate.
so the timer1 interrupt call to McBSP_Write() will find the write occurring
while the McBSP is busy.
For the above reason,
*I* would remove the call to McBSP_Write() from the McBSP transmit interrupt
function.
Here is a somewhat snipped example of setting up and using the McBSP
MCBSP_Handle hMcbsp0; /* handle for McBSP0 */
extern far void vectors();
void ConfigMcBSP(void);
IRQ_map(IRQ_EVT_XINT0, 12); // McBSP transmit
IRQ_map(IRQ_EVT_RINT0, 13); // McBSP receive
---------- Original Message -----------
From: b...@gmail.com
To: c...
Sent: Tue, 04 May 2010 06:53:39 -0400
Subject: [c6x] Re: McBSP 32 and 8 bit transfer
> Hi,
>
> You are right that best way was to check it on board - right now 8 bit
transfers work correct. I was using polling method for write and read:
> /* wait until the transmitter is ready for a sample then write to it */
> while (!MCBSP_xrdy(hMcbsp0));
> MCBSP_write(hMcbsp0,y);
>
> /* now wait until the value is received then read it */
> while (!MCBSP_rrdy(hMcbsp0));
>
> I would like to use interrupts in my program. Unfortunatelly I have probelm
with setup of it. Below is code from my project:
>
> #include
> #include
> #include
> #include
> #include /* */
> void initMcbsp(void);
> extern far void vectors();
> interrupt void c_int14();
> interrupt void c_int11();
> interrupt void c_int12();
> interrupt void c_int13();
> static TIMER_Handle hTimer1;
> static TIMER_Handle hTimer2;
> static Uint32 TimerEventId;
> static GPIO_Handle hGpio;
> Uint32 Current_dir;
> MCBSP_Handle hMcbsp0; // McBSP0 handle for loopback mode
>
> /* McBSP codec data channel configuration */
> MCBSP_Config mcbspCfg0 = {
> MCBSP_FMKS(SPCR, FREE, YES) | /* Free runinig mode is enabled
*/
> MCBSP_FMKS(SPCR, SOFT, YES) | /* */
> MCBSP_FMKS(SPCR, FRST, YES) | /* */
> MCBSP_FMKS(SPCR, GRST, YES) | /* Sample rate generator is out of
reset */
> MCBSP_FMKS(SPCR, XINTM, XRDY) | /* Transmit interrupt mode XINT
driven by XRDY */
> MCBSP_FMKS(SPCR, XSYNCERR, NO) | /* */
> MCBSP_FMKS(SPCR, XRST, YES) | /* serial port transmiter is
enabled */
> MCBSP_FMKS(SPCR, DLB, ON) | /* DIGITAL LOOPBACK MODE ENABLED!
*/
> MCBSP_FMKS(SPCR, RJUST, RZF) | /* right justify zero fill msb
*/
> MCBSP_FMKS(SPCR, CLKSTP, DISABLE) | /* */
> MCBSP_FMKS(SPCR, DXENA, OFF) | /* */
> MCBSP_FMKS(SPCR, RINTM, RRDY) | /* RINT driven by RRDY */
> MCBSP_FMKS(SPCR, RSYNCERR, NO) | /* */
> MCBSP_FMKS(SPCR, RRST, YES), /* serial port receiver is
enabled */
>
> MCBSP_FMKS(RCR, RPHASE, SINGLE) | /* single or dual phase */
> MCBSP_FMKS(RCR, RFRLEN2, OF(0)) | /* specifies the receive frame
length (number of words) in phase 2. */
> MCBSP_FMKS(RCR, RWDLEN2, 8BIT) | /* */
> MCBSP_FMKS(RCR, RCOMPAND, MSB) | /* msb go first */
> MCBSP_FMKS(RCR, RFIG, YES) | /* receive frame ignore bit ->
receive fram-synchronization pulses after the first pulse restarts the transfer
*/
> MCBSP_FMKS(RCR, RDATDLY, 0BIT) | /* receive data delay -> 0 bit
data delay */
> MCBSP_FMKS(RCR, RFRLEN1, OF(0)) | /* (RFRLEN1+1) specifies the
receive frame lenght (number of worlds in phase 1) -> 2words in phase 1 */
> MCBSP_FMKS(RCR, RWDLEN1, 8BIT) | /* */
> MCBSP_FMKS(RCR, RWDREVRS, DISABLE), /* reversal mode for 32bit
transfer */
> /* Transmit control register XCR */
> MCBSP_FMKS(XCR, XPHASE, SINGLE) | /* phase single */
> MCBSP_FMKS(XCR, XFRLEN2, OF(0)) | /* */
> MCBSP_FMKS(XCR, XWDLEN2, 8BIT) | /* */
> MCBSP_FMKS(XCR, XCOMPAND, MSB) | /* MSB go first */
> MCBSP_FMKS(XCR, XFIG, YES) | /* Transmit frame ignore bit.
Transmit frame-synchronization pulses after the first pulse restarts the
transfer. */
> MCBSP_FMKS(XCR, XDATDLY, 0BIT) | /* transmit data delay */
> MCBSP_FMKS(XCR, XFRLEN1, OF(0)) | /* */
> MCBSP_FMKS(XCR, XWDLEN1, 8BIT) | /* */
> MCBSP_FMKS(XCR, XWDREVRS, DISABLE), /* reversal mode disabled
*/
>
> MCBSP_FMKS(SRGR, GSYNC, FREE) |
> MCBSP_FMKS(SRGR, CLKSP, RISING) |
> MCBSP_FMKS(SRGR, CLKSM, INTERNAL) |
> MCBSP_FMKS(SRGR, FSGM, DXR2XSR) |
> MCBSP_FMKS(SRGR, FPER, OF(63)) | /* is ignored when FSGM, DXR2XSR
*/
> MCBSP_FMKS(SRGR, FWID, OF(31)) | /* is ignored when FSGM, DXR2XSR
*/
> MCBSP_FMKS(SRGR, CLKGDV, OF(15)), /* devider */
>
> MCBSP_MCR_DEFAULT,
> MCBSP_RCERE0_DEFAULT,
> MCBSP_RCERE1_DEFAULT,
> MCBSP_RCERE2_DEFAULT,
> MCBSP_RCERE3_DEFAULT,
> MCBSP_XCERE0_DEFAULT,
> MCBSP_XCERE1_DEFAULT,
> MCBSP_XCERE2_DEFAULT,
> MCBSP_XCERE3_DEFAULT,
>
> MCBSP_FMKS(PCR, XIOEN, SP) |/* dx, fsx, clkxp are set as serial
port */
> MCBSP_FMKS(PCR, RIOEN, SP) |/* dr, fsr, clks are set as serial
port */
> MCBSP_FMKS(PCR, FSXM, INTERNAL) | /* */
> MCBSP_FMKS(PCR, FSRM, INTERNAL) |
> MCBSP_FMKS(PCR, CLKXM, OUTPUT) |
> MCBSP_FMKS(PCR, CLKRM, INPUT) |
> MCBSP_FMKS(PCR, CLKSSTAT, 0) |
> MCBSP_FMKS(PCR, DXSTAT, 0) |
> MCBSP_FMKS(PCR, FSXP, ACTIVEHIGH) |
> MCBSP_FMKS(PCR, FSRP, ACTIVEHIGH) |
> MCBSP_FMKS(PCR, CLKXP, RISING) |
> MCBSP_FMKS(PCR, CLKRP, FALLING)
> };
>
> static Uint32 TimerControl = TIMER_CTL_RMK( /* Timer control register (CTL)*/
>
> TIMER_CTL_TSTAT_0,
>
> TIMER_CTL_INVINP_NO, /* TINP inverter control(INVINP). Only affects operation
> if CLKSRC =0.
> TIMER_CTL_INVINP_NO - Uninverted TINP drives timer
> TIMER_CTL_INVINP_YES - inverted TINP drives timer */
>
> TIMER_CTL_CLKSRC_CPUOVR8,/* Timer input clock source (CLKSRC)
> TIMER_CTL_CLKSRC_CPUOVR4 - CPU clock /4
*/
>
> TIMER_CTL_CP_PULSE, /* Clock/pulse mode(CP)
> TIMER_CTL_CP_PULSE - Pulse mode.TSTAT is active
one
> CPU clock after the timer reaches the
timer
> period.PWID determines when it goes
inactive.*/
>
> TIMER_CTL_HLD_NO, /* Hold(HLD). Counter may be read or written regardless of
> HLD value.
> TIMER_CTL_HLD_YES - Counter is disabled and
held in
> current value.
> TIMER_CTL_HLD_NO - COunter is allowed to
count. */
>
> TIMER_CTL_GO_NO, /* Go bit(GO). Resets and starts the timer counter.
> TIMER_CTL_GO_NO - No effects on the timer.
> TIMER_CTL_GO_YES - if HLD =1, the counter
register
> is zeroed and begins counting on next
clock. */
> TIMER_CTL_PWID_ONE, /* Pulse width(PWID). Only used in pulse mode.
> TIMER_CTL_PWID_ONE - TSTAT goes inactive one
timer
> input clock cycle after the timer counter
value
> equals the timer period value.
> TIMER_CTL_PWID_TWO - TSTAT goes inactive one timer
> input clock cycle after the timer counter
value
> equals the timer period value.
*/
> //TIMER_CTL_DATIN_0,
>
> TIMER_CTL_DATOUT_0, /* Data output (DATOUT).
> TIMER_CTL_DATOUT_0 - If FUNC =0,the DATOUT is
> driven on TOUT.
> TIMER_CTL_DATOUT_1 - If FUNC =1,The DATOUT is driven
> on TOUT after inversion by INVOUT.
*/
>
> TIMER_CTL_INVOUT_NO, /* TOUT inverter control (INVOUT)
> TIMER_CTL_INVOUT_NO - Uninverted TSTAT drives
TOUT
> TIMER_CTL_INVOUT_YES - Inverted TSTAT drives
TOUT.*/
> TIMER_CTL_FUNC_GPIO /* Function of TOUT pin(FUNC).
> TIMER_CTL_FUNC_GPIO - TOUT0 is a general
purpose
> output pin
> TIMER_CTL_FUNC_TOUT - TOUT is a timer output pin */
> );
>
> GPIO_Config MyConfig = {
> 0x00000011, /* gpgc Global Control Register was 31 modified */
> 0x00007FFF, /* gpen Enable Register all 15 GPIO are acive */
> 0x00001000, /* 1 */
> 0x00000800, /* gpval Value Register GP12 is set high */
> 0x00000000, /* gplm Low Mask Register used to configure iterupts disabled */
> 0x00000000 /*gppol Interrupt Polarity Register */
> };
>
> volatile Uint32 x,y;
> int z=0x000000A;
> void main(void)
> {
>
> int success = 0;
>
> CSL_init();
>
> x=1;
> /* Open TIMER1 device, and reset them to power-on default state */
> hTimer1 = TIMER_open(TIMER_DEV1, TIMER_OPEN_RESET);
> hTimer2 = TIMER_open(TIMER_DEV2, TIMER_OPEN_RESET);
> /* Obtain the event ID for the timer device */
> TimerEventId = TIMER_getEventId(hTimer1);
>
> GPIO_config(hGpio, &MyConfig);
> hGpio = GPIO_open(GPIO_DEV0, GPIO_OPEN_RESET);
>
> /* Configure the timer devices */
> TIMER_configArgs(hTimer1,
> TimerControl, /* use predefined control value */
> 0x07735940, /* set period 8ns*7735940=1s */ //2540BE40 = 5s
> 0x00000000 /* start count value at zero */
> );
>
> /* Configure the timer devices */
> TIMER_configArgs(hTimer2,
> TimerControl, /* use predefined control value */
> 0x2540BE40, /* set period 8ns*7735940=1s */ //2540BE40 = 5s
> 0x00000000 /* start count value at zero */
> );
>
> Current_dir = GPIO_pinDirection(hGpio, GPIO_PIN7,GPIO_OUTPUT);
> GPIO_pinWrite(hGpio,GPIO_PIN7,0);
>
> //GPIO_pinWrite(hGpio,GPIO_PIN7,0);
>
> IRQ_setVecs(vectors); /* point to the IRQ vector table */
>
> /* Map TIMER events to physical interrupt number */
> //IRQ_map(TimerEventId, 14);
> IRQ_map(IRQ_EVT_TINT1, 14);
> IRQ_map(IRQ_EVT_TINT2, 11);
> IRQ_clear(IRQ_EVT_TINT1);
>
> IRQ_map(IRQ_EVT_XINT0, 12); // McBSP transmit
> IRQ_map(IRQ_EVT_RINT0, 13); // McBSP receive
> IRQ_clear(IRQ_EVT_XINT0);
> IRQ_clear(IRQ_EVT_RINT0);
>
> /* Reset the timer events */
> IRQ_reset(TimerEventId);
>
> IRQ_globalEnable(); /* Globally enable interrupts */
> IRQ_enable(IRQ_EVT_TINT1);
> IRQ_enable(IRQ_EVT_TINT2);
> IRQ_enable(IRQ_EVT_XINT0);
> IRQ_enable(IRQ_EVT_RINT0);
> IRQ_nmiEnable(); /* Enable NMI interrupt */
>
>
>
> y=0x00000001;
> initMcbsp();
> delay();
>
>
> // IRQ_EVT_XINT0 12
> // IRQ_EVT_RINT0 13
> // TIMER_start(hTimer1);
> MCBSP_write(hMcbsp0,y);
> while(1)
> {
> //if (x == y)
> //GPIO_pinWrite(hGpio,GPIO_PIN7,1); // można wyłaczyć na czas
tesów
> ;
> }
> /* All done now, close the port. */
> MCBSP_close(hMcbsp0);
> // if (x == y) success =1;
>
> // if (success) GPIO_pinWrite(hGpio,GPIO_PIN7,1);
> }
> interrupt void c_int12() // for transmission
> {
> MCBSP_write(hMcbsp0,y);
> IRQ_clear(IRQ_EVT_XINT0);
> }
> interrupt void c_int13() //for receive
> {
> x=MCBSP_read(hMcbsp0);
> IRQ_clear(IRQ_EVT_RINT0);
> }
> interrupt void c_int14() //just test
> {
> y++;
> if (y == 5) y=0;
> MCBSP_write(hMcbsp0,y);
> TIMER_setCount(hTimer1,0x00000000);
> IRQ_clear(IRQ_EVT_TINT1);
> }
> interrupt void c_int11() //just test
> {
> IRQ_clear(IRQ_EVT_TINT2);
> }
>
> int delay(void)
> {
> int i;
> for (i=0;i<100;i++)
> ;
> return 0;
> }
>
> void initMcbsp()
> {
> /* Let's open up serial port 0 */
> hMcbsp0 = MCBSP_open(MCBSP_DEV0, MCBSP_OPEN_RESET);
>
> /* We'll set it up for digital loopback, 32bit mode. We have */
> /* to setup the sample rate generator to allow self clocking. */
> MCBSP_config(hMcbsp0, &mcbspCfg0);
>
> /* Now that the port is setup, let's enable it in steps. */
> MCBSP_start(hMcbsp0, MCBSP_XMIT_START | MCBSP_RCV_START |
> MCBSP_SRGR_START | MCBSP_SRGR_FRAMESYNC, 0x3000);
> }
>
> In above code interrupts from timers are working fine (every 1 and 5 seconds),
unfortunately I do not know why interrupts from McBSP are not working. I made a
debug session through program but cannot locate root of issue. How this
interrupts from McBSP should be setup? I mean IRQ_EVT_RINT0 and IRQ_EVT_XINT0
>
> Any help would really be appreciated.
>
> Rgs,
> Mike
>
Reply by bedn...@gmail.com●May 4, 20102010-05-04
Hi,
You are right that best way was to check it on board - right now 8 bit transfers
work correct. I was using polling method for write and read:
/* wait until the transmitter is ready for a sample then write to it */
while (!MCBSP_xrdy(hMcbsp0));
MCBSP_write(hMcbsp0,y);
/* now wait until the value is received then read it */
while (!MCBSP_rrdy(hMcbsp0));
I would like to use interrupts in my program. Unfortunatelly I have probelm with
setup of it. Below is code from my project:
#include
#include
#include
#include
#include
TIMER_CTL_CP_PULSE, /* Clock/pulse mode(CP)
TIMER_CTL_CP_PULSE - Pulse mode.TSTAT is active one
CPU clock after the timer reaches the timer
period.PWID determines when it goes inactive.*/
TIMER_CTL_HLD_NO, /* Hold(HLD). Counter may be read or written regardless of
HLD value.
TIMER_CTL_HLD_YES - Counter is disabled and held in
current value.
TIMER_CTL_HLD_NO - COunter is allowed to count. */
TIMER_CTL_GO_NO, /* Go bit(GO). Resets and starts the timer counter.
TIMER_CTL_GO_NO - No effects on the timer.
TIMER_CTL_GO_YES - if HLD =1, the counter register
is zeroed and begins counting on next clock. */
TIMER_CTL_PWID_ONE, /* Pulse width(PWID). Only used in pulse mode.
TIMER_CTL_PWID_ONE - TSTAT goes inactive one timer
input clock cycle after the timer counter value
equals the timer period value.
TIMER_CTL_PWID_TWO - TSTAT goes inactive one timer
input clock cycle after the timer counter value
equals the timer period value. */
//TIMER_CTL_DATIN_0,
TIMER_CTL_DATOUT_0, /* Data output (DATOUT).
TIMER_CTL_DATOUT_0 - If FUNC =0,the DATOUT is
driven on TOUT.
TIMER_CTL_DATOUT_1 - If FUNC =1,The DATOUT is
driven
on TOUT after inversion by INVOUT. */
TIMER_CTL_INVOUT_NO, /* TOUT inverter control (INVOUT)
TIMER_CTL_INVOUT_NO - Uninverted TSTAT drives TOUT
TIMER_CTL_INVOUT_YES - Inverted TSTAT drives TOUT.*/
TIMER_CTL_FUNC_GPIO /* Function of TOUT pin(FUNC).
TIMER_CTL_FUNC_GPIO - TOUT0 is a general purpose
output pin
TIMER_CTL_FUNC_TOUT - TOUT is a timer output pin
*/
);
GPIO_Config MyConfig = {
0x00000011, /* gpgc Global Control Register was 31 modified */
0x00007FFF, /* gpen Enable Register all 15 GPIO are acive */
0x00001000, /* 1 */
0x00000800, /* gpval Value Register GP12 is set high */
0x00000000, /* gplm Low Mask Register used to configure iterupts disabled
*/
0x00000000 /*gppol Interrupt Polarity Register */
};
volatile Uint32 x,y;
int z=0x000000A;
void main(void)
{
int success = 0;
CSL_init();
x=1;
/* Open TIMER1 device, and reset them to power-on default state */
hTimer1 = TIMER_open(TIMER_DEV1, TIMER_OPEN_RESET);
hTimer2 = TIMER_open(TIMER_DEV2, TIMER_OPEN_RESET);
/* Obtain the event ID for the timer device */
TimerEventId = TIMER_getEventId(hTimer1);
/* Configure the timer devices */
TIMER_configArgs(hTimer1,
TimerControl, /* use predefined control value */
0x07735940, /* set period 8ns*7735940=1s */ //2540BE40 = 5s
0x00000000 /* start count value at zero */
);
/* Configure the timer devices */
TIMER_configArgs(hTimer2,
TimerControl, /* use predefined control value */
0x2540BE40, /* set period 8ns*7735940=1s */ //2540BE40 = 5s
0x00000000 /* start count value at zero */
);
// IRQ_EVT_XINT0 12
// IRQ_EVT_RINT0 13
// TIMER_start(hTimer1);
MCBSP_write(hMcbsp0,y);
while(1)
{
//if (x == y)
//GPIO_pinWrite(hGpio,GPIO_PIN7,1); // można wyłaczyć na czas
tesów
;
}
/* All done now, close the port. */
MCBSP_close(hMcbsp0);
// if (x == y) success =1;
// if (success) GPIO_pinWrite(hGpio,GPIO_PIN7,1);
}
interrupt void c_int12() // for transmission
{
MCBSP_write(hMcbsp0,y);
IRQ_clear(IRQ_EVT_XINT0);
}
interrupt void c_int13() //for receive
{
x=MCBSP_read(hMcbsp0);
IRQ_clear(IRQ_EVT_RINT0);
}
interrupt void c_int14() //just test
{
y++;
if (y == 5) y=0;
MCBSP_write(hMcbsp0,y);
TIMER_setCount(hTimer1,0x00000000);
IRQ_clear(IRQ_EVT_TINT1);
}
interrupt void c_int11() //just test
{
IRQ_clear(IRQ_EVT_TINT2);
}
int delay(void)
{
int i;
for (i=0;i<100;i++)
;
return 0;
}
void initMcbsp()
{
/* Let's open up serial port 0 */
hMcbsp0 = MCBSP_open(MCBSP_DEV0, MCBSP_OPEN_RESET);
/* We'll set it up for digital loopback, 32bit mode. We have */
/* to setup the sample rate generator to allow self clocking. */
MCBSP_config(hMcbsp0, &mcbspCfg0);
/* Now that the port is setup, let's enable it in steps. */
MCBSP_start(hMcbsp0, MCBSP_XMIT_START | MCBSP_RCV_START |
MCBSP_SRGR_START | MCBSP_SRGR_FRAMESYNC, 0x3000);
}
In above code interrupts from timers are working fine (every 1 and 5 seconds),
unfortunately I do not know why interrupts from McBSP are not working. I made a
debug session through program but cannot locate root of issue. How this
interrupts from McBSP should be setup? I mean IRQ_EVT_RINT0 and IRQ_EVT_XINT0
Any help would really be appreciated.
Rgs,
Mike
_____________________________________
Reply by Richard Williams●May 3, 20102010-05-03
bedny,
I suspect a bit of experimentation would answer your questions even faster than
I can type this reply.
The way to transfer 8 bits is...
set the transmit and receive justification so the data is expected to be (for
instance) in the least significant bits.
Set the transmit and receive data length to 8 bits
Set to be only 1 channel and only one phase.
Set the frame length to 8 bits for transmit and receive
Set the FSX/FSR according as to whom will be driving the transmit and receive
timing/clocks.
Set the transmit and receive clocks to produce the desired bit rates.
Set the polarity to not invert the transmit data from the clock and to invert
the receive data from the clock.
for transmit:
place the data in the least significant bits of a 32 bit variable.
call the mcbsp_write() function.
for receive:
call the mcbsp_read() function.
extract the data from the least significant bits of the receiving variable.
Your current plan, as outlined in your post, seems to be very close to
correct.
R. Williams
---------- Original Message -----------
From: b...@gmail.com
To: c...
Sent: Mon, 03 May 2010 17:55:34 -0400
Subject: [c6x] McBSP 32 and 8 bit transfer
>
>
> Hi,
>
> I have a doubt while configuring port. I want to transfer 8 bit of data into
external device through McBSP. I set in XCR lenght of word XWDLEN1 to 8 bit and
this is one phase configuration.
> I am not sure if I can use in this case api function MCBSP_write cos it's
32 bit value direct write. MCBSP(hMcbsp, 0x12345678). Can I sent in this way
only 8 bits? If not how can I sent this 8 bit into port?
>
> I am even more confused when receiving data, accordingly there is api func.
called x=MCBSP_read(hMcbsp); can I read for example 8 bits if I set also
receiver into 8 bit mode? This function is also 32 bit direct read of DRR. How
differently can I read those 8 bits of incoming data?
>
> I look forward for any opinion of experienced in this issue people.
>
> Regards,
> Mike
Reply by bedn...@gmail.com●May 3, 20102010-05-03
Hi,
I have a doubt while configuring port. I want to transfer 8 bit of data into
external device through McBSP. I set in XCR lenght of word XWDLEN1 to 8 bit and
this is one phase configuration.
I am not sure if I can use in this case api function MCBSP_write cos it's
32 bit value direct write. MCBSP(hMcbsp, 0x12345678). Can I sent in this way
only 8 bits? If not how can I sent this 8 bit into port?
I am even more confused when receiving data, accordingly there is api func.
called x=MCBSP_read(hMcbsp); can I read for example 8 bits if I set also
receiver into 8 bit mode? This function is also 32 bit direct read of DRR. How
differently can I read those 8 bits of incoming data?
I look forward for any opinion of experienced in this issue people.