--- In , "Gunnleif" <gunnleif@k...> wrote: > I have just switched from using the standard USB interface to EZLite > Kit (Blackfin) to using JTAG (summit ice). And now I am experiencing > problems when I try to write to external memory. > With a little help from Analog's European DSP Support I manage to access the external RAM. Basically you have to initialize SDRAM, before it is possible to access it. They suggested that I should initialized via C code - code is listed below: #include <cdef21535.h> void Init_SDRAM(void) { *pEBIU_SDRRC = 0x074A; *pEBIU_SDBCTL = 0x00000001; *pEBIU_SDGCTL = 0x0091998F; } In order for this to work you have to download latest patch for visualdsp++ compiler version 6.2.7 which is available on analog ftp site. I found out myself, that it was possible to initialize SDRAM through assembler without patching visualdsp... I took a piece of the code from the dma_sdram tutorial which comes with the EZLite Kit - code is listed below: #include <def21535.h> #define SDRAM_0 0x00000000 //SDRAM Bank 0 .SECTION init_sdram; .global _init_sdram; _init_sdram: p0.l = EBIU_SDRRC & 0xffff; // Assign LSBs of p0 to point to SDRAM Refresh Rate Control Register p0.h = EBIU_SDRRC >> 16; // Assign MSBs of p0 to point to SDRAM Refresh Rate Control Register r0 = 0x074A (z); // Assign appropriate value to SDRAM Refresh Rate Control Register (zero extend) W[p0] = r0; // from the calculations in the commented section above SSYNC; p0.l = EBIU_SDBCTL & 0xffff; // Assign LSBs of p0 to point to SDRAM Memory Bank Control Register p0.h = EBIU_SDBCTL>> 16; // Assign MSBs of p0 to point to SDRAM Memory Bank Control Register r0 = 0x0001(z); // assign control data word to r0 [p0] = r0; // write control data word to EBIU_SDBCTl SSYNC; p0.l = EBIU_SDGCTL & 0xffff; // Assign LSBs of p0 to point to SDRAM Memory Global Control Register p0.h = EBIU_SDGCTL >> 16; // Assign MSBs of p0 to point to SDRAM Memory Global Control Register r0.l = 0x998d; // assign LSBs of control data word to r0 r0.h = 0x0091; // assign LSBs of control data word to r0 [p0] = r0; // write control data word to EBIU_SDGCTL SSYNC; RTS; _init_sdram_end: This works just as well. Best Regards Gunnleif Blaasvaer M.Sc.EE student Embedded Systems Aalborg University |