Hi Fran,

First of all you need to realize that the audio project handles 16-bit
transfer, while your interested in 32-bit transfer.

A frame zise of 64, allows you to transfer 32, 32-bit values.
Therefore your process function should process only 32 values at a
time - not 64 as I expect your doing. Change your process loop to -

for(i=0;i<size/2;i++)

Also in your Tx and RX Prime functions you should have something like
-

DSS_rxCnt = PIP_getWriterSize(rxPipe)/2;           // again 64/2 = 32
DSS_dmaRxStart(DSS_rxPtr, DSS_rxCnt);

Your transferring 32 values.

Finally change your index to 4.

Cheers,
Barra &#4294967295; Gr&#4294967295;obhtha.


rockall_rebel@yahoo.com (Fran MacCarthy) wrote in message news:<b1de7e66.0311291400.72f100e0@posting.google.com>...
> Hi all,
> 
> I'm new to the C6711DSK and I'm hoping you guys can help me to sort
> out one or two problems I'm having.
> 
> I'm attempting to use the EDMA controller to send and receive data via
> the McBSP which in turn interfaces to the AIC23EVM codec (which sends
> and receives 32bit samples (16bits per left and right channel)).
> Currently, I can send and receive data to the McBSP using the polling
> technique and this is working perfectly with no problems what so ever,
> so I'm now ready to advance to the EDMA stage. To do this, I thought I
> could make a few changes to the "audio" project example in the ccs
> examples folder, but I haven't been that lucky.
> 
> This is how I've set things up -
> 
> PIP (rxPipe and txPipe) -
> 
> bufseg - SDRAM
> bufalign - 4
> framesize in words - 64
> num of frames - 2
> 
> EDMA TX -
> 
> Frame Sync = None
> ESIZE = 32bit
> Source
>   2DS = Disabled
>   SUM = Index
>   Address = 0x00000000
> Destination 
>   2DS = Disabled
>   DUM = None 
>   Address = DSS_hMcbsp0 (McBSP handle)
> Element Index = 2
> Frame Index = 2
> TCINT = Enable
> TCC = 12
> FC=0
> EC=32
> ECRLD=0
> Link = Disabled
> PRI (low)
> 
> and something similar for Rx - I have the receive priority set to high
> for receiving.
> 
> These settings give me a sample rate which is half of that expected,
> for both receiving and transmitting. In other words, if I output a
> 100Hz wave, I get a 50Hz wave on my oscilloscope. I've tried changing
> every value I can think of - number of PIP frames, size of PIP frame,
> all the EDMA settings. I get all kinds of crazy outputs when I attempt
> this, but not the output I expect.
> 
> Do I need to change my McBSP settings? If they work correctly for
> polling, then I presume there is nothing I have to change if I wish to
> use EDMA instead.
> 
> To make sure that the sampling rate of the codec is not being changed,
> I placed a count in the EDMA IRS. When this count expires, I call
> EDMA_RSET(EER, 0x0000) and revert to polling for the samples. The
> output signal then doubles in frequency. This means that the codec is
> correctly configured for 88200Hz.
> 
> It seems to me that two output samples are being outputted when only
> one should be. How might this be happening?
> 
> Both left and right channels have the same outputs unless the upper or
> lower word of a sample is different. I tried changing the Element
> Index to one, and this is still the case, although the output with
> respect to time is muddled up.
> 
> I've spent the last few days trying to decipher the "audio" project
> with limited success. Could anyone offer me a simpler example?
> 
> Thanks for your help,
> 
> Francis

Hi all,

I'm new to the C6711DSK and I'm hoping you guys can help me to sort
out one or two problems I'm having.

I'm attempting to use the EDMA controller to send and receive data via
the McBSP which in turn interfaces to the AIC23EVM codec (which sends
and receives 32bit samples (16bits per left and right channel)).
Currently, I can send and receive data to the McBSP using the polling
technique and this is working perfectly with no problems what so ever,
so I'm now ready to advance to the EDMA stage. To do this, I thought I
could make a few changes to the "audio" project example in the ccs
examples folder, but I haven't been that lucky.

This is how I've set things up -

PIP (rxPipe and txPipe) -

bufseg - SDRAM
bufalign - 4
framesize in words - 64
num of frames - 2

EDMA TX -

Frame Sync = None
ESIZE = 32bit
Source
  2DS = Disabled
  SUM = Index
  Address = 0x00000000
Destination 
  2DS = Disabled
  DUM = None 
  Address = DSS_hMcbsp0 (McBSP handle)
Element Index = 2
Frame Index = 2
TCINT = Enable
TCC = 12
FC=0
EC=32
ECRLD=0
Link = Disabled
PRI (low)

and something similar for Rx - I have the receive priority set to high
for receiving.

These settings give me a sample rate which is half of that expected,
for both receiving and transmitting. In other words, if I output a
100Hz wave, I get a 50Hz wave on my oscilloscope. I've tried changing
every value I can think of - number of PIP frames, size of PIP frame,
all the EDMA settings. I get all kinds of crazy outputs when I attempt
this, but not the output I expect.

Do I need to change my McBSP settings? If they work correctly for
polling, then I presume there is nothing I have to change if I wish to
use EDMA instead.

To make sure that the sampling rate of the codec is not being changed,
I placed a count in the EDMA IRS. When this count expires, I call
EDMA_RSET(EER, 0x0000) and revert to polling for the samples. The
output signal then doubles in frequency. This means that the codec is
correctly configured for 88200Hz.

It seems to me that two output samples are being outputted when only
one should be. How might this be happening?

Both left and right channels have the same outputs unless the upper or
lower word of a sample is different. I tried changing the Element
Index to one, and this is still the case, although the output with
respect to time is muddled up.

I've spent the last few days trying to decipher the "audio" project
with limited success. Could anyone offer me a simpler example?

Thanks for your help,

Francis