Reply by Keith E. Larson November 6, 20032003-11-06
Hi again Bobby

Ah yes... the infamous JTAG test port /TRST line! Usually the key phrase
for catching this one is 'but it works when I have the emulator connected'.
Still, its good to know things are up and running.

The reasons for /TRST being low that I have been told are that this forces
the JTAG port into its reset state where (in theory) you cant

- Be in emulation mode
- Accidentally begin a scan in or out that could cause trouble

Incidentally, for anyone familiar with the previous C3x/C4x devices there
used to be pullups on INT0-INT3 and MCBL/MP. These were removed because too
many people were using external pull resistors in opposite direction that
would lead to a bad logic level. On the other hand, the JTAG port was
considered to be a pagen idle and could not be touched. This causes trouble
from time to time, especially as people mix other JTAG devices into the scan
chain. My suggestion, especially in light of the fact that the TI-JTAG port
is 14 pins and the rest of the world is not, is to not mix them.

Also, if anyone is wondering where these pullups and pulldowns appear in the
data sheet, have a look at where the input currents are specified. Since
the pullup/pulldown requires extra current, these pins are called out
seperately.

Hope this helps
Keith Larson

-----
At 05:38 PM 11/5/03 -0000, you wrote:
Keith,

I had /TRST pulled-up with a 10K resistor. Once I removed the resistor
(/TRST has an internal pull-down) all our power-up problems went away.

Thanks for the help!
--- In , "Keith E. Larson" <k-larson2@t...> wrote:
Hi Bobby

The VC33 is indeed IDLE2 corrected, so unless you have failed to hit either
an /INTx or /RESET line this would not be the problem. Instead, consider
that the processor has come up in some other strange mode... like an
emulation or test mode. Other than this, look at the oscillator circuitry.

- Floating reserved pin RSV0 (likely)
- JTAG pins tied in the wrong direction (/TRST default is low)
- If using PLL mode, are the PLL Vss/Vdd connected
- If using a crystal, is the crystal ringing? You may want to
try different Rs and C-loads

Other (related?) notes:

Looking at the clock inputs you will see that this device has two clock
inputs. The reason for this is that the crystal amplifier buffer works from
the 1.8V CVdd supply giving switching levels that are not truly DVdd-3.3V
compliant. The crystal amplifier also has a little more delay to it than a
direct feed. For proper operation be sure the other side of the XOR clock
combiner is tied off.

The RSVx pins are actually bi-directional IO pins that have been internally
wired as inputs. Therefor you should not tie them together. This is good
advice for any IO's as the short circuit drive current on any high speed
CMOS driver will be ~100mA per pin.

Hope this helps
Keith Larson
---
At 04:19 AM 10/31/03 -0000, you wrote:
We are trying to bring up an new board that contains a TMS320VC33 dsp.

After power-up the VC33's H1/H3 clocks are static and the dsp is in a locked
up state. TI does have an application note (sgua001c) that describes this
behavior in older DSP's. On power-up the dsp would randomly get into the
IDLE2 state. The only way to get the dsp out of IDLE2 was to toggle one of
the INTx lines, the dsp would then resume normal operation and could be
reset. The app note indicated that this was fixed in the VC33. We have
tried toggling the INTx lines after power, but this has failed to work.
Occasionally the dsp will come up correctly. Our power supply is normally a
switcher. The dsp always seems to come up when we connect it to our linear
lab supply. Unfortunately we have no control on what our customer will us as
a power supply board, so any power sequencing would need to be handled on
our board.

Has anyone seen this problem before or have any information?

Thanks
+-----------+
|Keith Larson |
|Member Group Technical Staff |
|Texas Instruments Incorporated |
| |
| 281-274-3288 |
| |
| www.micro.ti.com/~klarson |
|-----------+
| TMS320C3x/C4x/VC33 Applications |
| |
| TMS320VC33 |
| The lowest cost and lowest power 500 w/Mflop |
| floating point DSP on the planet! |
+-----------+


Reply by zappy_zap_zap November 5, 20032003-11-05
Keith,

I had /TRST pulled-up with a 10K resistor. Once I removed the
resistor (/TRST has an internal pull-down) all our power-up problems
went away.

Thanks for the help!

--- In , "Keith E. Larson" <k-larson2@t...> wrote:
> Hi Bobby
>
> The VC33 is indeed IDLE2 corrected, so unless you have failed to
hit either
> an /INTx or /RESET line this would not be the problem. Instead,
consider
> that the processor has come up in some other strange mode... like an
> emulation or test mode. Other than this, look at the oscillator
circuitry.
>
> - Floating reserved pin RSV0 (likely)
> - JTAG pins tied in the wrong direction (/TRST default is low)
> - If using PLL mode, are the PLL Vss/Vdd connected
> - If using a crystal, is the crystal ringing? You may want to
> try different Rs and C-loads
>
> Other (related?) notes:
>
> Looking at the clock inputs you will see that this device has two
clock
> inputs. The reason for this is that the crystal amplifier buffer
works from
> the 1.8V CVdd supply giving switching levels that are not truly
DVdd-3.3V
> compliant. The crystal amplifier also has a little more delay to
it than a
> direct feed. For proper operation be sure the other side of the
XOR clock
> combiner is tied off.
>
> The RSVx pins are actually bi-directional IO pins that have been
internally
> wired as inputs. Therefor you should not tie them together. This
is good
> advice for any IO's as the short circuit drive current on any high
speed
> CMOS driver will be ~100mA per pin.
>
> Hope this helps
> Keith Larson
>
> ---
> At 04:19 AM 10/31/03 -0000, you wrote:
> We are trying to bring up an new board that contains a TMS320VC33
dsp.
> After power-up the VC33's H1/H3 clocks are static and the dsp is in
a locked
> up state. TI does have an application note (sgua001c) that
describes this
> behavior in older DSP's. On power-up the dsp would randomly get
into the
> IDLE2 state. The only way to get the dsp out of IDLE2 was to
toggle one of
> the INTx lines, the dsp would then resume normal operation and
could be
> reset. The app note indicated that this was fixed in the VC33. We
have
> tried toggling the INTx lines after power, but this has failed to
work.
> Occasionally the dsp will come up correctly. Our power supply is
normally a
> switcher. The dsp always seems to come up when we connect it to
our linear
> lab supply. Unfortunately we have no control on what our customer
will us as
> a power supply board, so any power sequencing would need to be
handled on
> our board.
>
> Has anyone seen this problem before or have any information?
>
> Thanks
> +-----------+
> |Keith Larson |
> |Member Group Technical Staff |
> |Texas Instruments Incorporated |
> | |
> | 281-274-3288 |
> | k-larson2@t... |
> | www.micro.ti.com/~klarson |
> |-----------+
> | TMS320C3x/C4x/VC33 Applications |
> | |
> | TMS320VC33 |
> | The lowest cost and lowest power 500 w/Mflop |
> | floating point DSP on the planet! |
> +-----------+


Reply by Keith E. Larson November 3, 20032003-11-03
Hi Bobby

The VC33 is indeed IDLE2 corrected, so unless you have failed to hit either
an /INTx or /RESET line this would not be the problem. Instead, consider
that the processor has come up in some other strange mode... like an
emulation or test mode. Other than this, look at the oscillator circuitry.

- Floating reserved pin RSV0 (likely)
- JTAG pins tied in the wrong direction (/TRST default is low)
- If using PLL mode, are the PLL Vss/Vdd connected
- If using a crystal, is the crystal ringing? You may want to
try different Rs and C-loads

Other (related?) notes:

Looking at the clock inputs you will see that this device has two clock
inputs. The reason for this is that the crystal amplifier buffer works from
the 1.8V CVdd supply giving switching levels that are not truly DVdd-3.3V
compliant. The crystal amplifier also has a little more delay to it than a
direct feed. For proper operation be sure the other side of the XOR clock
combiner is tied off.

The RSVx pins are actually bi-directional IO pins that have been internally
wired as inputs. Therefor you should not tie them together. This is good
advice for any IO's as the short circuit drive current on any high speed
CMOS driver will be ~100mA per pin.

Hope this helps
Keith Larson

---
At 04:19 AM 10/31/03 -0000, you wrote:
We are trying to bring up an new board that contains a TMS320VC33 dsp.
After power-up the VC33's H1/H3 clocks are static and the dsp is in a locked
up state. TI does have an application note (sgua001c) that describes this
behavior in older DSP's. On power-up the dsp would randomly get into the
IDLE2 state. The only way to get the dsp out of IDLE2 was to toggle one of
the INTx lines, the dsp would then resume normal operation and could be
reset. The app note indicated that this was fixed in the VC33. We have
tried toggling the INTx lines after power, but this has failed to work.
Occasionally the dsp will come up correctly. Our power supply is normally a
switcher. The dsp always seems to come up when we connect it to our linear
lab supply. Unfortunately we have no control on what our customer will us as
a power supply board, so any power sequencing would need to be handled on
our board.

Has anyone seen this problem before or have any information?

Thanks
+-----------+
|Keith Larson |
|Member Group Technical Staff |
|Texas Instruments Incorporated |
| |
| 281-274-3288 |
| |
| www.micro.ti.com/~klarson |
|-----------+
| TMS320C3x/C4x/VC33 Applications |
| |
| TMS320VC33 |
| The lowest cost and lowest power 500 w/Mflop |
| floating point DSP on the planet! |
+-----------+



Reply by zappy_zap_zap October 31, 20032003-10-31
We are trying to bring up an new board that contains a TMS320VC33
dsp. After power-up the VC33's H1/H3 clocks are static and the dsp
is in a locked up state. TI does have an application note
(sgua001c) that describes this behavior in older DSP's. On power-up
the dsp would randomly get into the IDLE2 state. The only way to
get the dsp out of IDLE2 was to toggle one of the INTx lines, the
dsp would then resume normal operation and could be reset. The app
note indicated that this was fixed in the VC33. We have tried
toggling the INTx lines after power, but this has failed to work.
Occasionally the dsp will come up correctly. Our power supply is
normally a switcher. The dsp always seems to come up when we
connect it to our linear lab supply. Unfortunately we have no
control on what our customer will us as a power supply board, so any
power sequencing would need to be handled on our board.

Has anyone seen this problem before or have any information?

Thanks