Jean- > Thx for the response. I havn't had the opportunity to test the board > with the 19.2MHz oscillator (awaiting the components). > > Just to confirm: Besides the timing issues, there are no hardware > differences between the C5402 and C5402A devices as far as the data > lines and address lines goes, ie D0-D7 and A0-A16? This far I have only > tried to read the manufacturer and device codes form the FLASH, but I > read 16bit values from the 8bit FLASH - makes no sense - that's why I am > wondering if perhaps there are hardware differences between the devices, > or are you convinced it is simply a timing problem? As far as I know, there are no hardware differences and the devices are pin-compatible. But you should always double-check. One area to check is the boot value for CLKMD register (CLKMD pins). I have seen the CLKMD pin definitions change before from one C54xx device to another. I did not see an app note for "Migrating from C5402 to C5402A" on TI's website, as there is for C5409, but you might want to search around. -Jeff > -----Original Message----- > From: Jeff Brower [mailto:] > Sent: Friday, October 17, 2003 4:52 PM > To: Jean Viljoen > Cc: > Subject: Re: [c54x] 5402 and 5402A interface to flash memory > > Jean- > > > I have succesfully implemented my own driver for interfacing > > between a 100MHz C5402 running at 100MHz and a M29W010B flash > > memory module from STMicro. > > > > This driver does not however work with the C5402A ic running > > at 100MHz (20MHz oscillator with 5x multiplier, as for the C5402). > > My whole setup is the same, except for the switch in DSP between > > C5402 and C5402A. > > > > What can the problem be? I have setup the pinouts on the pcb for > > the C5402A pinouts and am sure that that is not the problem. I am > > further using a BGA device. > > A slight timing problem. Our experience with C5409 vs. C549 and A > version devices is > that the new method, where timing is "stretched linearly" based on clock > rate, has > subtle differences vs. the old method for which only option was to > insert integer > number of wait-states. For example, we found that C549 100 MHz could > access 8 nsec > SRAM with zero wait-states, but C5409A could only work up to 94 to 96 > MHz, depending > on the particular chip. > > I suggest to try C5402A with 19.2 MHz oscillator and see what happens. > > -Jeff |