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-----Ursprungliche Nachricht----- Von: Leigh Wells [SMTP:] Gesendet am: Donnerstag, 8. Juli 1999 18:05 An: Betreff: [c54x] Interrupt Servicing Hi all: I am using the '5410 eval board from Spectrum Digital and the TI emulator. I have a question about Interrupt Service Routines. I am using mnemonic assembly language only. The way I understand it, when the CPU receives an interrupt from the DMA, it jumps to the interrupt location (in my case 5ch), and reads the branch instruction at this location to get to the ISR. What is the best way to get the branch instruction into 5ch? Should I store the opcode to 5ch and the address I want it to go to in 5dh? [Thomas Hupp (TH)] 1. Give you interrupt routine a lable (example: _c_int00) an make the lable global (.def _c_int00) 2. Make an assembler file to define the ir - vector table an give the table his own section name (.vectors). In this vector table refer to the lable of your isr as following: .title "Vector Table" .ref _c_int00 .sect ".vectors" reset b _c_int00 ;0x00 nop nop nmi rete ;0x04 nop nop nop .... and so on (be carfull that you use always 4 word for each interrupt) Also, once I get the ISR written, how should I get it to reside at the program memory location that I want? For example, if I tell the CPU in the branch instruction that I want it to branch to at 1000h, how should I tell the compiler to put my ISR there? I have looked through the documentation, and have been unable to decipher what the best way to do this is. [Thomas Hupp (TH)] 3. In the linker command file put the vector table to it right address: MEMORY { PAGE 0: ...... VECS: origin = 0xff80, length = 0x0080 /* Interrupt Vectors */ ...... } SECTIONS { .vectors: > VECS PAGE 0 } Any help would be greatly appreciated. Leigh Wells Electrical Engineer Acoustic Positioning Research [Thomas Hupp (TH)] There are many way to do what you want - this is only one possibility Regards Thomas eGroups.com home: http://www.egroups.com/group/c54x http://www.egroups.com - Simplifying group communications |