OK, I am certainly not a PWM guru, but I have been studying the beast and this much I can help with.... Possible problems: 1. Your dead time may not be long enough. What is the turn-off time of your IGBT? Also remember the dead time has to be programmed BEFORE enable PWMEN or OUTCTL bits are set. or an improper dead time can occur. 2. Init waveforms are cross conducting. Are you not turning on the outputs until AFTER you have setup all the PWM regs? 3. Port control may be reverting to independent control rather than complementary. Not sure how this might happen since power up state is Complementary PWM, but still worth double checking. To better help you, I would need to know the topology full or half bridge, and maybe even a hint at what your drivers are and what voltages you are working at. Also you should be looking at implementing a hardware overcurrent that is independent of the processor, so it the code goes south, the bridge will still shut down. Kind regards, Tim +++++++++ contact info ++++++++ Tim Economu Senior Design Engineer Offgrid Engineering LLC 4131 Springwater Rd. Clinton, WA 98236 USA phone: 360-579-2117 http://www.offgridengineering.com +++++++++++++++++++++++++++ ----- Original Message ----- From: "Matteo_Cardin" <> To: <> Sent: Monday, April 08, 2002 08:19 AM Subject: [motoroladsp] PWM module initialization > Hello at all, > maybe someone can help me: > I have some problems with the PWM initialization (I'm not sure at > 100%: sometime my IGBT is exploded during the power-on sequence). > I don't use the Motorola SDK and my initialization function is the > following: > > void Init_PWM(void) > { > // PWM FAULT CONTROL REGISTER > *pwmfctl=0x0000; > // PWM STATUS & ACKNOWLEDGE REGISTER > *pwmfsa=0xf03f; > *pwmout=0x3f00; // PWM Output Control Reg. PAD DISABLED ! > > *pwmcm600; // PWM Counter Modulo Reg. (Xtal=7.3728MHz) > > // Deadtime=1/36864000 * pwmdeadtm > *pwmdeadtm7; // PWM Deadtime Reg.=1us > *pwmccr=0x0000; // PWM Channel Control Register > > *pwmdismap1=0x5555; // FAULT 0 + FAULT 2 > *pwmdismap2=0x0055; > > // PWM Config Register > // [15..13] = 000 Reserved bits > // [12] (EDG) = 0 Center-aligned PWM > // [11] = 0 Reserved bit > // [10..8] (TOPNEG) = 111 Negative Top-side Polarity > // [7] = 0 Reserved bit > // [6..4] (BOTNEG) = 111 Negative bottom-side Polarity > // [3..1] (INDEP) = 000 Complementary PWM pair > // [0] (WP) = 1 Write-protectable register are not writeable > *pwmcfg=0x0771; > // [15..12] (LDFQ3..0)= 0000 PWM reload every 1 PWM opportunities > // [11] (HALF) = 1 Half-cycle reloads enabled > // [10] (IPOL0) = 0 PWM value register 2 in next PWM cycle > // [9] (IPOL2) = 0 PWM value register 1 in next PWM cycle > // [8] (IPOL3) = 0 PWM value register 4 in next PWM cycle (?) > // [7..6] (PRSC1..0) = 00 PWM clock frequency = fIPbus > // [5] (PWMRIE) = 0 PWMF CPU interrupt request disabled > // [4] (PWMF) = 0 Reload cycle since last PWMF clearing > // [3..2] (ISENS1..0) = 00 No correction of the deadtime distortion > // [1] (LDOK) = 1 Load new modulus,prescaler and PWM values > // [0] (PWMEN) = 1 PWM generator and PWM pins enabled > unless OUTCTL=1 > *pwmctl=0x0803; > > // PWM CONTROL REGISTER > if (*pwmfsa&0x0200) // if fault > SetAlarm(FAULT); > I always set the *pwmctl register to 0x0803 because I must generate > the resolver excitation signal synchronous with the PWM signal. > > Is possible, after setting the WP bit in the pwmcfg register, to > turn on in the same moment the top side and the bottom side of the > bridge? > > If someone is able to help me I'll be very happy! > Thanks. > Matteo > _____________________________________ > Note: If you do a simple "reply" with your email client, only the author of this message will receive your answer. You need to do a "reply all" if you want your answer to be distributed to the entire group. > > _____________________________________ > About this discussion group: > > To Join: > > To Post: > > To Leave: > > Archives: http://www.yahoogroups.com/group/motoroladsp > > More Groups: http://www.dsprelated.com/groups.php3 > ">http://docs.yahoo.com/info/terms/ > > |