Thnx, but plz take into consideration that the required stop band
attenuation is 110DB. So, is this still too much?

Also, kindly tell me which type of multiplier would u recommend to
use.

Thnx


Vladimir Vassilevsky <vlv@abvolt.com> wrote in message news:<3F5DECF2.A8AA415@abvolt.com>...
> Ahmad wrote:
> > 
> > Hi everybody,
> > 
> >    I am designing a decimation filter for a 16bit delta-sigma A/D. The
> > decimator will be a CIC decimate by 16 filter, followed by two FIR
> > filters to get the required attenuation. I have two questions as most
> > of my experience is in analog & not digital design.
> > 
> > 1- The filter order of the FIR filters is about 100 or 150, is this
> > normal or too much??
> 
> It looks like too much. The reasonable order for the decimation FIR
> should be about several dozens. You should split the decimation into
> 2..3 stages.
> 
> Vladimir Vassilevsky
> 
> DSP and Mixed Signal Design Consultant
> 
> http://www.abvolt.com

Ahmad wrote:
> 
> Hi everybody,
> 
>    I am designing a decimation filter for a 16bit delta-sigma A/D. The
> decimator will be a CIC decimate by 16 filter, followed by two FIR
> filters to get the required attenuation. I have two questions as most
> of my experience is in analog & not digital design.
> 
> 1- The filter order of the FIR filters is about 100 or 150, is this
> normal or too much??

It looks like too much. The reasonable order for the decimation FIR
should be about several dozens. You should split the decimation into
2..3 stages.

Vladimir Vassilevsky

DSP and Mixed Signal Design Consultant

http://www.abvolt.com

Hi everybody,

   I am designing a decimation filter for a 16bit delta-sigma A/D. The
decimator will be a CIC decimate by 16 filter, followed by two FIR
filters to get the required attenuation. I have two questions as most
of my experience is in analog & not digital design.

1- The filter order of the FIR filters is about 100 or 150, is this
normal or too much??

2- The multiplier seems to be the big problem area wise, is it wise to
go for CSD or booth multiplier, or something else??

PS: Any hints to ready written VHDL code for FIR filters, or
multipliers would be great.

Kindly give your recommendations
Your help is highly appreciated.

Thanks