I think you mistakes. By "immediate addressing" TI means many
things, for example 1. ld #num,A - the immediate-addressed number num is included in the instruction opcode 2. ld *(x),A - the immediate-addressed address x is included in the instruction opcode. So, I think that by saying "dmad is using immediate addressing" TI support means that 7 offset bits are included in the instruction opcode. As to Chapter 5, "Volume 1: CPU and Peripherals" - the quotes in my original question are from there. Now, combining the kind comments of Jeff Brower, answer of TI's support and my own experiments I would define dmad addressing as follows: dmad is the direct data-memory addressing mode with 7 offset bits put into instruction opcode and segment 9 bits assumed zero. Any objection? Ilya Druker --- In , Micah Caudle <micah_caudle@y...> wrote: > They lied to you. dmad is used in Absolute Addressing > not in Immediate Addressing. And, furthermore, > immediate addressing does not have anything to do with > DP, CPL or SP anyway. The DP, CPL and SP stuff is > involved in Direct Addressing. Everything you need to > know is located in Chapter 5, "Volume 1: CPU and > Peripherals" document spru131G. > Hope that helps, > Micah > > > Message: 2 > > Date: Thu, 03 Jun 2004 14:06:57 -0000 > > From: "Ilya Druker" <ied1970r@h...> > > Subject: 'dmad' - fundamental question to > > specialists > > > > Gentlemen, > > > > I am desperately looking for answer to the question > > what is 'dmad' > > addressing mode? The TI's materials don't give an > > intelligible > > definition but only foggiest discriptions like > > "16-bits immediate data > > memory address (0<=dmad<e535)" or "uses a specific > > value to specify > > and address in data space" or "the syntax for dmad > > uses a symbol or a > > number to specify an address in data space" etc. I > > dared to ask TI's > > support and their answer was: > > > > "dmad is using immediate addressing. > > In C54x TI terminology, immediate addressing is a > > "fixed" address > > composed of 2 "halves". > > 7-bits contained within the instruction's opcode > > 9-bits contained in the the DP (Data-memory page > > Pointer) register" > > > > It seems wrong as in the following example all 16 > > bits were put by > > compiler to the opcode of the instruction (to remind > > - the syntax is > > "MVDM dmad,MMR"): > > MVDM *(33000),AR3 > > > > Moreover, I don't see any difference in the > > performance under > > different environment conditions: > > 1. MVDM AR2,AR3 ; when CPL=0 and DP=0 > > 2. MVDM AR2,AR3 ; when CPL=0 and DP!=0 > > 3. MVDM AR2,AR3 ; when CPL=1 and DP=0 > > 4. MVDM AR2,AR3 ; when CPL=1 and DP!=0 > > 5. MVDM *(AR2),AR3 > > It seems that DSP just ignores DP when the mode is > > dmad. If it is so > > why do we need MVMM for copying content of one > > register to another if > > we can use MVDM for that: instead of > > MVMM AR2,AR3 > > use > > MVDM AR2,AR3 > > or > > MVMD AR2,AR3 ? > > > > Can somebody make an order in this mess? I would > > really appreciate a > > competent answer or a reference. > > > > Thank you, > > Ilya Druker > > > > > > > > __________________________________ > |