Reply by Keith E. Larson February 16, 20042004-02-16
Hello Alex

The first "why" is setting the bus control register for 0-ws operation. But
also notice that on the first line the 'LOPOWER' instruction. This slows
the CPU master clock rate by 1/16 making the bus timings somewhat slow even
though it is configured for 0-ws operation.

The second "why" is simply an external event that you can synchronize an
external device (maybe an oscilloscope) to. Though it is often true that
you would most likely want to signal an event to the outside world during an
interrupt, this instruction actually has nothing to do with interrupts.

I would be remiss if I did not point out that the 'IACK' instruction is
poorly named as 'Interrupt Acknowledge' as it has little to do with
interrupts. Rather IACK should be (in my opinion) relabled 'Instruction
Acknowledge" wherever it is found. Basically the IACK instruction is used
to signal an event by an external 'IACK' pin going active. This and the
address that is driven out can tell you which IACK generated the pulse. The
bottom line is that an IACK can appear anywhere in your code.

Best regards,
Keith Larson
=============================
At 12:22 AM 2/16/04 -0300, you wrote:
Hi, my name is Alex.
I have been reading this work "Using PC parallel port to boot DSP using sync
serial port " and I think it is an excelent work. But I would like to know
if anybody can help me to understand line to line of this:

Assembly Code I used for Testing the Bootloader

;***************************************************************
; XF_TOGL.ASM
; Keith Larson
; (c) Texas Instruments Inc, 2001
;
; Toggles the XF0 and XF1 pins (and the IACK pin) at the loop
; rate. Add nops or some other kind of delay to change the
; pulse rates and widths.
;
; NOTE: Avoid 0x809800 and 0x809801 as these locations
; are used by the bootloader as stack space
;***************************************************************
.start "CODE",0x809802
.sect "CODE"
.entry MAIN
MAIN LOPOWER
ldp @0x808064
ldi 0x1018,R0 (why?)
sti R0,@0x808064
LOOP1 ldi 1000,RC
RPTB LOOP2
ldi 0x22,IOF
ldi 0x66,IOF
LOOP2 iack @0x80A000 (why?)
b LOOP1
+--------------------------+
| Keith Larson |
| Member Group Technical Staff |
| Texas Instruments Incorporated |
| |
| 281-274-3288 |
| |
| www.micro.ti.com/~klarson (TI internal web only) |
|--------------------------+
| TMS320C3x/C4x/VC33 Applications |
| |
| TMS320VC33 |
| The lowest cost and lowest power 500 w/Mflop |
| floating point DSP on the planet! |
| |
| Web: focus.ti.com/docs/toolsw/folders/print/tmdsdsk33.html |
| Code: www-s.ti.com/sc/psheets/sprc147/sprc147.zip |
+--------------------------+


Reply by Alejandro Manzo February 16, 20042004-02-16
Hi, my name is Alex.
I have been reading this work "Using PC parallel port to boot DSP using sync
serial port " and I think it is an excelent work.
But I would like to know if anybody can help me to understand line to line of
this: Assembly Code I used for Testing the Bootloader

;***************************************************************
; XF_TOGL.ASM
; Keith Larson
; (c) Texas Instruments Inc, 2001
;
; Toggles the XF0 and XF1 pins (and the IACK pin) at the loop
; rate. Add nops or some other kind of delay to change the
; pulse rates and widths.
;
; NOTE: Avoid 0x809800 and 0x809801 as these locations
; are used by the bootloader as stack space
;***************************************************************
.start "CODE",0x809802
.sect "CODE"
.entry MAIN
MAIN LOPOWER
ldp @0x808064
ldi 0x1018,R0 (why?)
sti R0,@0x808064
LOOP1 ldi 1000,RC
RPTB LOOP2
ldi 0x22,IOF
ldi 0x66,IOF
LOOP2 iack @0x80A000 (why?)
b LOOP1