You are correct. Since the original question was about a "connector
pin", my first inclination was to look at the schematics and trace it back to
the source. I should have remembered that it was connected directly [from
a logic perspective] to the McBSP - I could have then taken by own advice and
read the manual.
Fortunately the McBSP is the most powerful synchronous port that i have
used - unfortunately it is very complex.
regards,
mikedunn
Pin I/O/Z
Description
CLKR
I/O/Z Receive clock
CLKX I/O/Z Transmit
clock
CLKS
I External clock
DR
I Received serial data
DX
O/Z Transmitted serial data
FSR I/O/Z Receive
frame synchronization
FSX I/O/Z Transmit
frame synchronization
Wojciech
Rewers <w...@yahoo.com> wrote:
--- Mike Dunn wrote: > CLKR and CLKS - could
they be clock send and clock > receive??
;-) Mike - there is
CLKR and CLKX for receive and transmit respectively ;-)
> [I
do not have 6713 schematics with me].
I believe the McBSP on C6713 is
the same as on all other C6x devices...
__________________________________
Reply by olaf636●August 20, 20032003-08-20
aaaaaaaaaaaaaaaaaaaaaaaaaaaa :) *now* i understood !
so i do have a McBSP-master and a -slave....
for the transmitter (if you are confirm with the registers...):
GSYNC=0 sample rate generator is free running
FSXM=1 determined by the FSGM-bit in SRGR
CLKXM=1 CLKX is an output
and for the receiver (with questions):
GSYNC=0 because i did not use CLKS
FSRM=0 signals generated by external device, so is now input-pin
CLKRM=0 receive clock is input-pin driven by external clock (=the
Master-McBSP-clock)
now if i set the RINTM (receive interrupt mode) on "00" (RINT
driven
by RRDY) or "10" (RINT driven by new frame snyc) it has to be
possible
that the slave-mcbsp detect new data on the DR0-pin ?
depends the FSGM-bit in the SRGR on the RINTM-bit ? or otherwise ?
FSGM=0 (FSX generated on every DXR-to-XSR-copy) -> RINTM
FSGM=1 (FSX driven by SRG frame sync signal FSG) -> RINTM
have the transmit and receive clock polarities even or odd ?
and thats my slave-test-loop:
if (1)
{
value = MCBSP_read(hMcbsp0);
printf(" received value: %d ", value);
}
sincerely,
olaf lindner
Reply by Wojciech Rewers●August 20, 20032003-08-20
--- Mike Dunn <> wrote: > CLKR and CLKS - could they be clock send and
clock
> receive??
;-) Mike - there is CLKR and CLKX for receive and
transmit respectively ;-)
> [I do not have 6713 schematics with me].
I believe the McBSP on C6713 is the same as on all
other C6x devices...
__________________________________
Reply by Mike Dunn●August 20, 20032003-08-20
olaf,
CLKR and CLKS - could they be clock send and clock receive??
[I do not have 6713 schematics with me].
Remember that for multidrop if you are using internal clock, you can only
do that for one node - the others must be external.
With the McBSP, problems are often more likely to be sw than
hardware.
Do you have access to a scope??
mikedunn olaf636 <c...@t-online.de> wrote:
i try to make a data transfer via the McBSP0 on the C6713 DSK. first, i have connected as follows: CLKX0 -> CLKR0 FSX0 ->
FSR0 DX0 -> DR0 but without success....
what is the
meaning of the CLKR-pin on the peripheral connector ? i have the choice of
internal and external clock. the internal is the sample rate generator and
the external is via the CLKS-pin - but when can i use the CLKR-pin ?
thanks,
olaf lindner _____________________________________ Note: If you do a simple "reply"
with your email client, only the author of this message will receive your
answer. You need to do a "reply all" if you want your answer to be distributed
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_____________________________________ About
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Reply by Wojciech Rewers●August 20, 20032003-08-20
--- olaf636 <> wrote: > what is the meaning of the CLKR-pin on the
> peripheral connector ?
> i have the choice of internal and external clock.
> the internal is the
> sample rate generator and the external is via the
> CLKS-pin - but when
> can i use the CLKR-pin ?
well - I think you misunderstood the whole thing...
you have a choice of internal and external clock -
that's true...
but the external clock is via the CLKR pin set as an
input!!!
as far as I understand chapter 12 of spru190d - CLKR
can be set as:
1. input (for external clocking of McBSP receiver) or
2. as an output (for internal clocking of McBSP
receiver).
now - if you use CLKR as input and the external device
is driving it - the CLKS is unused...
the second options is, that you set CLKR as an output
- then the McBSP has to drive CLKR and the SRCR is
used to generate the signal for CLKR - the clock for
Sample Rate Generator can be either internal or
external - and that's where the CLKS is used - to
drive the Sample Rate Generator who is then driving
the CLKR pin...
I figured it all in 5 minutes of reading the spru190d
so I'm not 100% sure of all that - so - correct me if
I'm wrong...
__________________________________
Reply by olaf636●August 20, 20032003-08-20
i try to make a data transfer via the McBSP0 on the C6713 DSK.
first, i have connected as follows:
CLKX0 -> CLKR0
FSX0 -> FSR0
DX0 -> DR0
but without success....
what is the meaning of the CLKR-pin on the peripheral connector ?
i have the choice of internal and external clock. the internal is the
sample rate generator and the external is via the CLKS-pin - but when
can i use the CLKR-pin ?