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Even if the pull-up is disabled while the SPI
is enabled, the pin is a GPIO with the internal pull-up enabled when it comes
out of reset. You could detect the presence or absence of the daughter card
first, and then enable the SPI.
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Even if the pull-up is disabled while the SPI
is enabled, the pin is a GPIO with the internal pull-up enabled when it comes
out of reset. You could detect the presence or absence of the daughter card
first, and then enable the SPI.
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Terry / whom ever,
Thanks for the info Terry, I will add the pull ups to
the next rev, but let me rephrase...
I have a board that does not have an external pull-ups
on the MISO bus. I'm trying to detect if a daughter board that has a
CPLD tied to the SPI bus is present. If the board is not connected I read
back all 1's, but I'm curious if this pin (MISO) is pulled up
internally or if it's just luck (latched up) that I get all
one's. On the next rev I'll add the pull-ups to guarantee the
detection, but it's the 50 boards I already have that I'm trying to
figure out if I need to dead bug a pull-up or if I'm good to
go.
Jacob
P.S. Thanks to
everyone for so much help on the JTAG programming
question.
From: Litinas, Terry [mailto:t...@itwbe.com] Sent: Wednesday, March 24, 2004 4:28 AM To: 'Jacob Christ'; 'Motoroladsp' Subject: RE: [motoroladsp] MISO Jacob,
I don't know if the data sheet or users manual actually
says but we use a 56F807 in spi master mode and have 4.7K pull ups to 3.3V on
both MISO and MOSI and it seems to work fine.
Terry Litinas
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Jacob,
I don't know if the data sheet or users manual actually
says but we use a 56F807 in spi master mode and have 4.7K pull ups to 3.3V on
both MISO and MOSI and it seems to work fine.
Terry Litinas
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