Reply by apod...@ceit.es October 6, 20062006-10-06
Hello Manish,

I am developing code for interfacing TMS320C54CST and PCM3003 codec (will switch to AIC23 soon) using the TMS320C54CST EVM and PCM3003 daughter card. I have found some useful code for that and also got hints from TI tech support. Do you still need help?

Best regards

Adam

Hi All,
>
> We are developing basic analog phone using TMS320C54CST and
>MSM7716 as codec.
[...]
Reply by Manish Varma August 2, 20062006-08-02
Hi All,

We are developing basic analog phone using TMS320C54CST and
MSM7716 as codec.

Codec is going to be connected at McBSP0 for audio data and
McBSP1 configured thru SPI for control data.

I need to know how we can configure the McBSP for our codec
(MSM7716), we have tried to configure but looks like its not working
for us.

So any suggession how to do this or any basic source code to
configure McBSP and read write will be great help as we are at
critical stage of the project.

I am also not sure whether the McBSP setting will depend upon
codec we use, as I am new to DSP so plz bare with my stupid question..
Thanks,

Manish
//Code for McBSP #0 initialization

void McBSP0_Init(void)
{
MCBSP_Config mcbspCFG0;

mcbspCFG0.spcr1 = MCBSP_SPCR1_RMK(
MCBSP_SPCR1_DLB_DEFAULT,
MCBSP_SPCR1_RJUST_DEFAULT,
MCBSP_SPCR1_CLKSTP_DEFAULT,
MCBSP_SPCR1_DXENA_DEFAULT,
//MCBSP_SPCR1_RINTM_RRDY,
MCBSP_SPCR1_RINTM_DEFAULT,
MCBSP_SPCR1_RRST_ENABLE
);

mcbspCFG0.spcr2 = MCBSP_SPCR2_RMK(
MCBSP_SPCR2_FREE_DEFAULT,
MCBSP_SPCR2_SOFT_DEFAULT,
MCBSP_SPCR2_FRST_DEFAULT,
MCBSP_SPCR2_GRST_DEFAULT,
MCBSP_SPCR2_XINTM_DEFAULT,
MCBSP_SPCR2_XRST_ENABLE
);

mcbspCFG0.rcr1 = MCBSP_RCR1_RMK(
MCBSP_RCR1_RFRLEN1_OF(0),
MCBSP_RCR1_RWDLEN1_16BIT
);

mcbspCFG0.rcr2 = MCBSP_RCR2_RMK(
MCBSP_RCR2_RPHASE_DEFAULT,
MCBSP_RCR2_RFRLEN2_OF(0),
MCBSP_RCR2_RWDLEN2_DEFAULT,
MCBSP_RCR2_RCOMPAND_DEFAULT,
//MCBSP_RCR2_RFIG_NO,
MCBSP_RCR2_RFIG_DEFAULT,
MCBSP_RCR2_RDATDLY_0BIT
);

mcbspCFG0.xcr1 = MCBSP_XCR1_RMK(
MCBSP_XCR1_XFRLEN1_OF(0),
MCBSP_XCR1_XWDLEN1_16BIT
);

mcbspCFG0.xcr2 = MCBSP_XCR2_RMK(
MCBSP_XCR2_XPHASE_DEFAULT,
MCBSP_XCR2_XFRLEN2_OF(0),
MCBSP_XCR2_XWDLEN2_DEFAULT,
MCBSP_XCR2_XCOMPAND_DEFAULT,
//MCBSP_XCR2_XFIG_NO,
MCBSP_XCR2_XFIG_DEFAULT,
MCBSP_XCR2_XDATDLY_0BIT
);

mcbspCFG0.srgr1 = MCBSP_SRGR1_RMK(
MCBSP_SRGR1_FWID_OF(0),
MCBSP_SRGR1_CLKGDV_OF(0)
);

mcbspCFG0.srgr2 = MCBSP_SRGR2_RMK(
MCBSP_SRGR2_GSYNC_DEFAULT,
MCBSP_SRGR2_CLKSP_RISING,
MCBSP_SRGR2_CLKSM_CLKS,
MCBSP_SRGR2_FSGM_DEFAULT,
MCBSP_SRGR2_FPER_OF(0)
);

mcbspCFG0.pcr = MCBSP_PCR_RMK(
MCBSP_PCR_XIOEN_DEFAULT,
MCBSP_PCR_RIOEN_DEFAULT,
MCBSP_PCR_FSXM_DEFAULT,
MCBSP_PCR_FSRM_DEFAULT,
MCBSP_PCR_CLKXM_DEFAULT,
MCBSP_PCR_CLKRM_DEFAULT,
MCBSP_PCR_SCLKME_DEFAULT,
MCBSP_PCR_FSXP_ACTIVELOW,
MCBSP_PCR_FSRP_ACTIVELOW,
MCBSP_PCR_CLKXP_RISING, // Writing data on Rising Edge
MCBSP_PCR_CLKRP_DEFAULT // Reading data on falling Edge
);

asm(" rpt #0x0100 "); // waiting for 2 CLKG
asm(" nop ");

hMcbsp0 = MCBSP_open(MCBSP_PORT0, MCBSP_OPEN_RESET);
MCBSP_config(hMcbsp0, &mcbspCFG0);

}